Improved Cycle Time of CDSEM Measurements Through Novel Alignment Methodologies & Data Storage Optimization

As process complexity increases in the manufacturing of leading-edge logic technologies, we see a trend for an increased number of measurement steps along with an increase in the complexity of these measurement steps. In a high-volume manufacturing setting, efforts are needed to improve measurement efficiency and reduce the overall impact to wafer cycle time through the line. This paper will present the process through which a new wafer alignment methodology and data storage optimization strategies were identified, tested, and implemented to Critical Dimension measurements using a Scanning Electron Microscope (CDSEM) that yielded on average a 17% reduction in overall measurement recipe cycle time.