Ultra-Low Power Reconfigurable Synaptic and Neuronal Transistor for Spiking Neural Network

In this article, we have proposed a novel reconfigurable synaptic and neuronal transistor (RSNT) at sub-10 nm regime for the spiking neural network (SNN). From calibrated TCAD simulations, we demonstrated that the proposed RSNT mimics both synaptic and neuronal functionalities. The proposed RSNT comprises of two gates, front gate (FG) and back gate (BG) to configure as a synapse and neuron, respectively. We investigated the synapse characteristics such as short-term (ST) and long-term (LT) synaptic plasticity (STSP/LTSP). The STSP is distinguished in terms of short-term potentiation/depression and paired-pulse facilitation/depression (PPF/PPD). And the LTSP is characterized by analyzing the long-term potentiation/depression (LTP/LTD) and spike-timing-dependent plasticity (STDP). Moreover, the energy consumption of the RSNT device during the facilitation and depression events is 4.5 pJ and 6.0 pJ, respectively. The reconfigurable leaky integrate-and-fire (LIF) neuron requires 1.2 fJ energy per spike (E
$_{spike}$
) for firing which is
$\sim$
10
$^{4}$
× less E
$_{spike}$
and
$\sim$
9 × lower supply voltage as compared to the PD-SOI MOSFET based LIF neuron. The simulation results assures that the proposed RSNT with various synaptic and LIF neuronal characteristics at sub-10 nm regime has potential application for the neuromorphic systems as it increases the integration density and eases the fabrication complexity.