Front-end CMOS chipset for 10 Gb/s communication

A 10 Gb/s communication chipset is realized for the first time in 0.18 /spl mu/m generic CMOS. It comprises (all fully differential): (i) a transimpedance amplifier: gain=1300 /spl Omega/, bandwidth 9 GHz; optical. (ii) a limiting amplifier: t/sub rise/, t/sub fall/<23 ps; sensitivity=5 mV at BER=10/sup -12/. (iii) a laser driver: adjustable I/sub bias/ (up to 40 mA) and I/sub mod/ (up to 35 mA), driving a laser module with Z/sub in/=50 /spl Omega/.