Experimental Studies on the Impact of Chassis Voltage on a GNSS Receiver Embedded Navigation Computer, Results and Design Improvements

Global Navigation Satellite System (GNSS) receivers are a suitable candidate for aiding the performance of a low cost IMU for launch vehicle which injects satellites to Low Earth Orbit (LEO). The GNSS receiver can be embedded into the navigation processor itself for reducing size, weight and cost. The navigation computer in a launch vehicle, being a mission critical element is generally designed with special care w.r.t its grounding scheme, isolation techniques and quality standards. The incorporation of a GNSS receiver into the navigation computer calls for major design changes. Being an RF circuit, the signal ground of a GNSS receiver should be connected to chassis of the launch vehicle. This contradicts the normal notion of ground isolation with chassis followed in navigation computers. A GNSS embed Navigation Processor (GNP) board which houses a Navigation processor and a NavIC/GPS receiver is developed for launch vehicle applications. In view of the change in grounding philosophy, the GNP board is subjected different tests to simulate the chassis potential rise scenarios commonly seen in a launch vehicle. Different conditions like inadvertent chassis voltage during stage separation, instruments converter shorting to chassis, pyro or valve battery live shorting to chassis and pyro or valve battery live shorting to return are simulated. The tests results are critically analyzed and some design improvements are implemented to make GNP more robust to chassis voltages.