Low Power and High Speed Two Stage Comparator in ADC

In this paper, a two-stage dynamic comparator has been discussed having low power consumption and also improves the speed and performance which are mainly used in ADCs. These are the main components which limit and decide the conversion rate. The pre amplifier has been made changes to have low power consumption and also low kickback noise and also improves speed. The latch stage also improved to increase speed. All the circuits are executed and implemented using cadence tools. And the results have shown that considerable increase speed and decrease in power consumption.