Verification of an ARM Cortex-M3 based SoC using UVM

The complexity of the System-on-Chip (SoC) based systems has been increasing with the advent of mobile devices and IoT. As a result, SoC verification is becoming more challenging. Although verification engineers have made great strides in making verification faster, cheaper, and more effective than in previous decades, that progress has not kept pace with the growth of complexity and size of modern Integrated Circuits (ICs). This paper discusses the current SoC verification challenges and how we might alleviate some of these challenges by using our proposed verification approach and SoC-based verification architecture targeting SoC verification. The presented verification architecture assists testbench developers in reducing verification time and boosting the reusability of testbenches. The paper also contains a case study that mustrates how to develop and use the suggested architecture to test and verify an ARM Cortex-M3 based SoC. The block level verification environments for the processor and bus matrix, as well as the system level verification environment for the SoC, are presented. Finally, results and simulations of the case study are provided, including test strategies, simulated scenarios, and coverage figures.