A Review on Evolution of Approximate Truncation Multipliers

Multiplier plays a vital role in designing a digital signal processor. The major goals for designing a multiplier is to optimize area, delay and power consumption. These objectives can be accomplished by using approximate multiplier technique in which bit width of output and inputs are equal. This fixed width computing introduces a major feature by enhancing speed and efficiency of multiplier design with fault tolerance ability. The approximate multiplier based digital systems can be utilized for signal processing and digital communication applications. Several research studies for optimizing multiplier performance were published. This literature survey presents a comparative study of some modern fixed width multiplier designs. In this work, features and operational principles of various multiplier designs are discussed. At last the future research work based on approximate multiplier also discussed.