Process Condition Effects on Saddle Fin Profile and Its Device Performance Below 20nm Advanced DRAM

In this paper, a 16nm saddle fin structure was modeled. Active area width (AA CD), AA tapper angle, buried word line trench width (BW CD) and BW tapper angle effects on the device performance were investigated using a built-in drift-diffusion solver. Our analysis confirms that the smaller AA tapper angle and proper AA CD can generate higher on-state current (Ion) and lead to lower off-state current(Ioff). In addition, in our fin sputter model, lower sputter ratio increase Ion, and lower sputter angle reduce Ioff and subthreshold swing(SS).