Cross-Temperature Reliabilities in TLC 3D NAND Flash Memory: Characterization and Solution

Temperature impacts on the reliabilities of TLC 3D NAND flash memory are investigated through cross-temperature measurements, and a simple method is proposed to estimate the optimal read voltage
$(\mathrm{V}_{\text{opt}})$
to lower the error bits. With real chip characterizations, it is shown that
$\mathrm{V}_{\text{opt}}$
is strongly correlated to the temperature difference between data reading and data programming, rather than the temperature itself. This indicates that
$\mathrm{V}_{\text{opt}}$
can be obtained by using
$\mathrm{V}_{\text{th}}$
offset between operation temperatures. The effects of the proposed scheme are also evaluated in real chips, showing that ~60% error bits can be well suppressed.