Efficient Simulation of the Effect of Solder Voids and Tilting on the Cooling of Power Semiconductors

In this research, a time-efficient and sufficiently detailed simulation model is presented to study the effect of solder voids on the cooling of power semiconductors. The simulation of multiple fault cases as well as highly inclined semiconductor placement gives insight into the severity of such. By a partitioning of the solder layer into 600 independent elements, the model is designed to allow a simulation of multiple solder faults. This enables the model to generate a high amount of training cases for a machine learning model for the detection of faults in the solder layer.