GHz programmable dual-modulus prescaler for multi-standard wireless applications

A new and simple approach to design a programmable prescaler for wireless applications is presented. Employing an expanded ring counter chain and a de-multiplexer in the counter loop results in an accurate frequency division and can provide various frequency-division ratios. The ring counter is implemented with true-single-phase (TSPC) type DFF and PTL (pass transistor logic) type demultiplexer to enhance speed performance. PTL output is bootstrapped. With 0.5 /spl mu/m CMOS technology and 3.3/5-V supply, the prescaler is aimed for GSM900/CDMA applications in this paper. The proposed prescaler structure can be adopted for multi-standard wireless applications covering DCS1800, WCDMA, and Bluetooth.