New thermally enhanced packages for power MOSFETs in battery pack applications

Recent advances in silicon technology have enabled smaller, higher-efficiency devices by increasing the transistor cell density on the silicon level to 178 million cells per square inch. These silicon capabilities represent a major advance over the devices available just a few years ago, and it is important that advances in packaging technology keep pace. Because of the demanding power and size requirements of next-generation portable devices, new compact packages with superior current-handling capabilities will be increasingly important. In this article, a new thermally enhanced package technology from Vishay Siliconix will be introduced for use in cellular phone 1-2 cell Li+ battery-protection circuits. With the die attach copper pad soldered directly to the printed circuit board, this new packaging technique provides a direct, low-resistance thermal path to the substrate on which the device is mounted. Characteristics of thermally enhanced 1212-8 package will be compared to that of the industry standard TSSOP-8 package through review of the MOSFET packaging trends used in today's battery pack protection circuits.