An optimization scheme to improve the write performance of PCM

With the advent of the era of big data, new computer applications have entered a stage of rapid development. Big data processing demands higher and higher access speed and storage capacity of memory. As a kind of non-volatile Memory (NVM), Phase Change Memory (PCM) is considered as the most potential next-generation Memory due to its good scalability, low energy consumption and high storage density. However, PCM has the disadvantage of limited write times. After a period of continuous write operations, it will lead to memory failure, which limits its application in main memory system. In order to avoid this problem, we test the main memory data of 12 benchmark programs under PARSEC load, and find that the proportion of continuous 8 bits all 0 in the data is very high, the lowest proportion is about 11%, the highest proportion is about 89%.In addition, the proportion of continuous 8-bit data being all 0 in most benchmark programs will increase with the increase of the number of threads. Aiming at this finding, the FlipFlag algorithm is proposed to reduce the total amount of data written into PCM storage unit as much as possible by taking advantage of this feature of data. The physical characteristics of PCM are simulated by integrated Gem5 simulator and NVMain memory simulator to test the algorithm. Experimental results show that compared with Flip-N-Write algorithm, FlipFlag algorithm can reduce the number of write bits by about 8% and 6% on average. The maximum reduction of energy consumption is about 11%, and the average reduction is 5%.