A 28-nm CMOS Sub-Volt PA With High Power Density and Common-Mode Stability Design

A sub-volt high power density power amplifier (PA) with common-mode stability enhancement using 28-nm HPC+ CMOS for fifth generation (5G) is presented in this letter. The proposed PA with supply voltage of merely 0.9-V achieves the ultrahigh output power density up to 798.8 mW/mm
²
, which has only
$156 \mu \text{m}$
for active area width that is suitable for compact dual-polarization phased array layout. The saturated output power (
$P_{\mathrm {sat}}$
) is 16.1 dBm with 38% peak power added efficiency (PAE), output 1-dB compression point (OP
$_{1\text {-dB}}$
) of 12.6 dBm, and 14-dB power gain at 28 GHz. This PA meets the high power density in the CMOS process below 2-V supply voltage compared to published PAs at 28 GHz.