A Loop Optimization Method for Dataflow Architecture

Dataflow architecture is a promising parallel computing platform that provides high performance, high efficiency and flexibility. Since the execution of a loop is usually the most time-consuming in a program, extracting sufficient loop-level parallelism is an essential task of dataflow architecture. However, existing methods often result in low execution performance and poor hardware utilization due to the imbalance among dataflow graph nodes and the non-preemptive mechanism. To tackle these problems, this paper makes three contributions: 1) A highly effective dataflow graph balancing method is developed to improve the utilization. 2) An enhanced dataflow execution model is proposed, which adapts a novel preemptive mechanism to further improve the hardware utilization and performance. 3) A decoupled dataflow architecture is designed to efficiently support our proposed dataflow execution model. Experiment shows that our methods can achieve an average of 2.61 ×performance improvement and 2.5 ×utilization improvement compared to the state-of-the-art methods with acceptable overhead.