Simultaneous Extraction of Mobility Enhancement Factor and Threshold Voltage With Parasitic Resistances in Amorphous Oxide Semiconductor Thin-Film Transistors

This study presents a technique for simultaneous and consistent extraction of the mobility enhancement factor (
$\gamma $
) and the threshold voltage (
${V}_{T}$
) with parasitic source and drain resistances (
${R}_{S}$
and
${R}_{D}$
) in amorphous oxide semiconductor (AOS) thin film transistors (TFTs). This technique allows for the extraction of
${R}_{S}$
from
${R}_{D}$
as well as the accurate extraction of
${V}_{T}$
and
$\gamma $
with only
${I}$
–
${V}$
characteristics of the saturation operation in a single AOS TFT. The proposed technique was applied to amorphous indium–gallium–zinc-oxide (a-IGZO) TFTs with various structures. For intentional asymmetry, we confirmed the consistency with an external resistor (
${R}_{\text {ext}} = {10}$
, 20, 30
$\text{k}\Omega $
). Extracted parameters (
${R}_{S}$
,
${R}_{D}$
,
${V}_{T}$
, and
$\gamma $
) by the proposed method were compared with parameters extracted by other methods for verification. Furthermore, the drain current (
${I}_{D}$
) was well reproduced using the extracted parameters regardless of
${R}_{\text {ext}}$
.