9.1 D1: A 7nm ML Training Processor with Wave Clock Distribution

D1 is the ML training processor in the DOJO exa-scale computer system [1], [2]. DOJO applications include training ML networks that run on the Tesla Full Self-Driving (FSD) computer in Tesla vehicles [3], [4]. D1 chip design goals were high performance, wide operating range, and scalable and modular construction featuring reduced design mismatch and high block-reuse.