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A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit Density | IEEE Conference Publication | IEEE Xplore

A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit Density


Abstract:

Successful deployment of multiple generations of the 4\mathsf{b}/\mathsf{cell} (QLC) floating-gate 3D-NAND technology has paved the way for the industry-wide adoption o...Show More

Abstract:

Successful deployment of multiple generations of the 4\mathsf{b}/\mathsf{cell} (QLC) floating-gate 3D-NAND technology has paved the way for the industry-wide adoption of \mathsf{QLC} [1-4]. The transition to 5b/cell (PLC) will be another steppingstone to accelerating bit density growth and expanding Flash storage to wider markets, where a lower cost at a reasonable performance is the paramount requirement.
Date of Conference: 19-23 February 2023
Date Added to IEEE Xplore: 23 March 2023
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Conference Location: San Francisco, CA, USA

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