Second-Order Transimpedance Amplifiers in Mixer-First Receivers: Design for Optimum Blocker Tolerance

A design-oriented analysis of a transimpedance amplifier (TIA) reveals the optimum compression-free dynamic range for downconverted blockers lying in its 2nd-order transition band. The unique circuit topology is chosen to eliminate low-frequency zeros of the transfer function to TIA output with only one OpAmp. Two approaches lead to TIA designs with or without capacitive positive feedback. Both configurations are analyzed and discussed. Simple and accurate design equations allow the component value to be selected straightforwardly.
$\omega _{0}$
and
$Q$
of the two poles are independently controlled. Analytical expressions for out-of-band (OOB) linearity are derived, explaining different distortion mechanisms from both gate and drain voltages of a FET. The FET gate voltage is shown to affect the distortion even if its swing is much lower than the drain voltage swing. The design fully benefits from 2nd-order filtering, yielding optimum blocker tolerance. Power dissipation is limited by the requirements for noise figure and independent pole control. A mixer-first receiver that operates from 1 to 7GHz is realized on 65nm RF-SOI CMOS. It displays +31.1dBm OOB input-referred third-order intercept point (OOB-IIP3), and +11.8dBm OOB blocker 1-dB compression point (B1dB). The TIA consumes 22mW. The prototype verifies the TIA design.