MVSG GaN-HEMT Model: Approach to Simulate Fringing Field Capacitances, Gate Current De-biasing, and Charge Trapping Effects

This paper presents new features of the latest MIT Virtual Source GaN-HEMT (MVSG) model covering fringing field capacitances, gate current de-biasing, and charge trapping effects. These model augmentations capture physical device phenomena observed in industry-devices in a robust, computationally efficient fashion. The features enhance simulation accuracy in both HV and RF-circuit applications and is included in the upcoming standard release of the industry-standard MVSG Verilog-A code. Contributions of this work are: (i) Bias-dependent fringing fields that can describe non-linear device-capacitance behavior due to charge-depletion in drain-access region beyond the last field-plate (FP). Previously, this effect was modeled using a "dummy" non-physical field-plate. (ii) Assignment of gate-source and gate-drain Schottky diodes to internal source/drain-nodes before and after FPs. Charge-depletion in FPs at high VDS results in transitions in both gate-current (IG) and capacitance (CGG) which can be accurately modeled using the new approach. (iii) Enhanced charge-trapping effects that include drain-lag and gate-lag effects, both capture and emission time-constants and their temperature-dependencies. The model is calibrated against measured transient pulsing data and accurately describes dynamic saturation-current (IDSat), knee-voltage (VKnee) and output-conductance (gDS). New parameters are added in the model to capture the effects and can be extracted from independent measurements.