Evaluation of the Single-Event-Upset Vulnerability for Low-Energy Protons at the 7- and 5-nm Bulk FinFET Nodes

Upsets due to low-energy protons are a concern for highly scaled technology nodes as critical charges for storage cells continue to decrease. This work evaluates the single-event upset (SEU) vulnerability of D-flip-flop (FF) and static random access memory (SRAM) designs at the 7- and 5-nm bulk FinFET nodes. D-FF designs at the 5-nm node have SEU cross-sections that are an order of magnitude greater than that of the 7-nm node due to unbalanced decreases in critical charge and collected charge. Upsets were observed for a wider range of proton energies for the 5-nm node than the 7-nm node D-FFs due to the decreases in critical charge and changes in fin geometry with scaling. Despite its smaller cell size, the single-port (SP) SRAM design was more susceptible than the two-port (TP) SRAM design due to the lower critical charge. Multicell upsets (MCUs) due to lower energy protons were observed for the first time for SRAM designs at the 5-nm node. The results of this study indicate that designers will need to be mindful of SEUs for environments with significant fluxes of low-energy protons.