VLSI Architecture for Energy-Efficient and Accurate Pre-Processing Pan-Tompkins Design

This work proposes an energy-efficient and accurate VLSI architecture of the pre-processing Pan-Tompkins algorithm (PTA) for filtering electrocardiogram (ECG) signals. The PTA is among the most straightforward algorithms to detect the QRS complex in ECG signals. This work proposes a fully-parallel PTA architecture with a reduced amount of registers, directly impacting energy reduction. Furthermore, we implement a unified band-pass filter exploring shift-add arrangement to reduce the noises in the ECG signal. This strategy contributes to the savings of 46.49% and 34.64% in the area and energy per operation (EPO), respectively, compared to the literature, keeping the average sensitivity and positive prediction for examined samples at 99.73% and 99.71%, respectively.