TI-ADC System Mismatch Error Estimation and Compensation

With the development of radar technology, the system bandwidth has become wider and wider, and the sampling rate of the single-chip analog-to-digital converter (Analog to Digital Converter, ADC) can no longer meet some high-performance applications. Time Interleaved ADC (TI-ADC) technology uses multiple low-speed ADCs to achieve high-speed acquisition, which solves the contradiction between ADC chip sampling rate and resolution, and is currently the most commonly used high-speed acquisition solution. Due to the system architecture, the TI-ADC acquisition process will produce offset mismatch, gain mismatch, delay mismatch and frequency-related mismatch, which seriously affects system performance. This paper improves the TI-ADC system mismatch error estimation algorithm and proposes a compensation algorithm based on the perfect reconstruction filter model.