A Compact and PVT-Robust Segmented Duty-Cycled Resistor Realizing TΩ Impedances for Neural Recording Interface Circuits

This letter presents an area-efficient and PVT-insensitive segmented duty-cycled resistor (SDR) intended for neural recording amplifiers. The feedback resistor of the capacitively coupled low-noise amplifier is realized with segmentation of the polysilicon resistor and supplementary switches in between. The proposed SDR suppresses impedance reduction due to the switching of the resistor’s parasitic capacitance. It ensures higher than 1-
$\text{T}\Omega $
resistance and a switching frequency above the signal bandwidth simultaneously, thus removing in-band switching artifacts and output dc drift. Fabricated in 0.18-
$\mu \text{m}$
CMOS, the prototype SDR achieves up to 1.18T
$\Omega $
with the smallest temperature variation of 6.5% and chip-to-chip variation of 1.5%, while only occupying an area of 0.001375 mm2. Furthermore, it offers sufficiently low and stable cut-off frequencies for both action and local field potential recordings.