Low temperature source/drain epitaxy and functional silicides: essentials for ultimate contact scaling

Low temperature Si
1-x
Ge
x
source-drain epitaxy processes are associated with exploratory contact metals to identify stacks alleviating access resistance issues in modern logic devices. TiN/W metal-to-metal interfaces featuring contact resistivities <5 × 10
^-10
Ω.cm
²
demonstrate the resolution of the test vehicle and extraction methods. Amongst the different systems investigated, Sc/Si:P yields $\sim1.3 \times 10^{-9} \Omega \cdot cm^{2}$, which represents a ~35% reduction with respect to the Ti/Si:P reference. This confirms that doping levels in Si:P are sufficient to achieve significant performance gains. Analyses of Sc/Si:P stacks reveal the material properties and reaction mechanisms responsible for the contact resistivity reduction.