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Bo Cheng - IEEE Xplore Author Profile
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Bo Cheng

Publications
181
Citations
2,751
Publications by Year
20082025
Co-Authors:
Show All Co-Authors (189)
Image of author Bo Cheng

Bo Cheng

Affiliation

State Key Laboratory of networking and switching technology
Beijing University of Posts and Telecommunication
Beijing, China

Publication Topics

Biography

Bo Cheng received the PhD degree in computer science and technology from the University of Electronics Science and Technology of China in 2006. His research interests include multimedia communications and services computing. He is currently an associate professor in the State Key Laboratory of Networking and Switching Technology, Beijing University of Posts and Telecommunications. He is a member of the IEEE. (Based on document published on 20 January 2016).
Publications
181
Citations
2,751
Publications by Year
20082025
Co-Authors:
Show All Co-Authors (189)
Author's Published Works

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Low-Power High Precision Floating-Point Divider With Bidimensional Linear Approximation

Gennaro Di Meo;Antonio Giuseppe Maria Strollo;Davide De Caro;Luca Tegazzini;Ettore Napoli

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2025 | Volume: 72, Issue: 2 | Journal Article |
In this paper we propose a novel approximate floating-point divider based on bidimensional linear approximation. In our approach, the mantissa quotient is seen as a function of the two input mantissas of the divider. The domain of this two-variable function is partitioned into nx \times ny subregions, named tiles, where nx, ny are chosen as powers of two. In each tile the quotient is appro...Show More

Low-Power High Precision Floating-Point Divider With Bidimensional Linear Approximation

Gennaro Di Meo;Antonio Giuseppe Maria Strollo;Davide De Caro;Luca Tegazzini;Ettore Napoli

Year: 2025 | Volume: 72, Issue: 2 | Journal Article |

Approximate Full-Adders: A Comprehensive Analysis

Ettore Napoli;Efstratios Zacharelos;Antonio G. M. Strollo;Gennaro Di Meo

IEEE Access
Year: 2024 | Volume: 12 | Journal Article |
Cited by: Papers (2)
Approximate computing is a technique that sacrifices the accuracy of the result for an advantage in terms of power, area, and speed. It is useful for error-tolerant applications such as image and video processing. Many approximate arithmetic circuits can be devised using approximate versions of the basic binary full adder that simply adds three bits to generate carry and sum. Therefore, the approx...Show More

Approximate Full-Adders: A Comprehensive Analysis

Ettore Napoli;Efstratios Zacharelos;Antonio G. M. Strollo;Gennaro Di Meo

Year: 2024 | Volume: 12 | Journal Article |

Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers

Ettore Napoli;Antonio G.M. Strollo;Efstratios Zacharelos;Gennaro Di Meo

2024 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2024 | Conference Paper |
Cited by: Papers (1)
Approximate arithmetic circuits sacrifice computing accuracy in exchange for improvements in power, area, and speed. Many approximate binary multipliers that use 4-2 compressors have been proposed but most of the proposals have error performances that depend on the order in which the inputs are connected to the compressors. This complicates the design and prevents a fair comparison among different...Show More

Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers

Ettore Napoli;Antonio G.M. Strollo;Efstratios Zacharelos;Gennaro Di Meo

Year: 2024 | Conference Paper |

On-Chip Spike Detection and Classification using Neural Networks and Approximate Computing

Efstratios Zacharelos;Ciro Scognamillo;Ettore Napoli;Diego Gragnaniello

2023 IEEE Biomedical Circuits and Systems Conference (BioCAS)
Year: 2023 | Conference Paper |
Cited by: Papers (4)
Neural ensembles control sensory, motor, and cognitive functions. Action potentials of neuronal cells (spikes) may signify such functions, or the presence of a pathology. In this paper we give the circuital implementation of an Artificial Neural Network, able to sort (detect and classify) spikes in real time. The system is synthesized targeting a 14nm FinFET technology. To partially alleviate the ...Show More

On-Chip Spike Detection and Classification using Neural Networks and Approximate Computing

Efstratios Zacharelos;Ciro Scognamillo;Ettore Napoli;Diego Gragnaniello

Year: 2023 | Conference Paper |

CFPM: Run-time Configurable Floating-Point Multiplier

Gerardo Saggese;Ettore Napoli;Antonio Giuseppe Maria Strollo

2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)
Year: 2023 | Conference Paper |
Cited by: Papers (2)
Approximate computing is a new approach that can help to reduce power consumption in error-resilient applications. Although many works have been proposed for fixed-point multipliers with predetermined levels of accuracy, they are not able to adapt to a wide range of applications, that need floating-point calculations with time-varying requirements. In this paper, we introduce an adjustable floatin...Show More

CFPM: Run-time Configurable Floating-Point Multiplier

Gerardo Saggese;Ettore Napoli;Antonio Giuseppe Maria Strollo

Year: 2023 | Conference Paper |

Approximate Recursive Multipliers Using Carry Truncation and Error Compensation

Italo Nunziata;Efstratios Zacharelos;Gerardo Saggese;Antonio Maria Giuseppe Strollo;Ettore Napoli

2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)
Year: 2022 | Conference Paper |
Cited by: Papers (4)
Approximate computing is a fast-emerging paradigm promising higher circuit performances in error tolerant applications. Binary multipliers are a common target for approximate computing due to their complexity and the multitude of their applications. In this paper, we investigate approximate recursive multipliers based on novel 4x4 multiplier blocks. We present three approximate 4x4 multipliers, wi...Show More

Approximate Recursive Multipliers Using Carry Truncation and Error Compensation

Italo Nunziata;Efstratios Zacharelos;Gerardo Saggese;Antonio Maria Giuseppe Strollo;Ettore Napoli

Year: 2022 | Conference Paper |

Approximate Recursive Multipliers Using Low Power Building Blocks

Efstratios Zacharelos;Italo Nunziata;Gerardo Saggese;Antonio G.M. Strollo;Ettore Napoli

IEEE Transactions on Emerging Topics in Computing
Year: 2022 | Volume: 10, Issue: 3 | Journal Article |
Cited by: Papers (33)
Approximate computing, frequently used in error tolerant applications, aims to achieve higher circuit performances by allowing the possibility of inaccurate results, rather than guaranteeing a correct outcome. Many contributions target the binary multiplier aiming to minimize the complexity of this common yet power-hungry circuit. Approximate recursive multipliers are low-power designs that exploi...Show More

Approximate Recursive Multipliers Using Low Power Building Blocks

Efstratios Zacharelos;Italo Nunziata;Gerardo Saggese;Antonio G.M. Strollo;Ettore Napoli

Year: 2022 | Volume: 10, Issue: 3 | Journal Article |

Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements

Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra;Gerardo Saggese;Gennaro Di Meo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2022 | Volume: 69, Issue: 6 | Journal Article |
Cited by: Papers (38)
Approximate multipliers are used in error-tolerant applications, sacrificing the accuracy of results to minimize power or delay. In this paper we investigate approximate multipliers using static segmentation. In these circuits a set of $m$ contiguous bits (a segment of $m$ bits) is extracted from each of the two $n$ -bits operand, the two segments are in input to a small $m\times m$ interna...Show More

Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements

Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra;Gerardo Saggese;Gennaro Di Meo

Year: 2022 | Volume: 69, Issue: 6 | Journal Article |

A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error

Gennaro Di Meo;Davide De Caro;Gerardo Saggese;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2022 | Volume: 69, Issue: 1 | Journal Article |
Cited by: Papers (9)
In this paper, a novel implementation is proposed for the Delayed LMS (DLMS) filter, able to reduce the power dissipation while preserving regime performances. The approach relies on the observation that the error signal is small in magnitude and oscillates around zero when the circuit is close to the convergence point. Therefore, the most significant bits of the error signal continuously toggle f...Show More

A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error

Gennaro Di Meo;Davide De Caro;Gerardo Saggese;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

Year: 2022 | Volume: 69, Issue: 1 | Journal Article |

Real-Time Downsampling in Digital Storage Oscilloscopes With Multichannel Architectures

Ettore Napoli;Efstratios Zacharelos;Mauro D’Arco;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2021 | Volume: 68, Issue: 10 | Journal Article |
Cited by: Papers (6)
Digital Storage Oscilloscopes (DSOs) conjugate high performance with large number of features and flexibility. The basic structure, based on fast Analog to Digital Converter (ADC) and memory, is augmented with several components for channel matching and bandwidth improvement, and processors that provide visualization, frequency processing, jitter and stability measurement, etc. Unfortunately, fine...Show More

Real-Time Downsampling in Digital Storage Oscilloscopes With Multichannel Architectures

Ettore Napoli;Efstratios Zacharelos;Mauro D’Arco;Antonio Giuseppe Maria Strollo

Year: 2021 | Volume: 68, Issue: 10 | Journal Article |

Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding

Gennaro Di Meo;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G.M. Strollo

2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Year: 2020 | Conference Paper |
Cited by: Papers (2)
Least Mean Square (LMS) filters are the most used adaptive filters with applications ranging from channel equalization to system identification and noise cancellation. An LMS adaptive filter includes two main parts: a FIR filter and a block for coefficients updating that exploits the LMS algorithm. The hardware implementation of LMS filter requires a significant number of multipliers, adders and r...Show More

Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding

Gennaro Di Meo;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G.M. Strollo

Year: 2020 | Conference Paper |

Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor

Antonio G. M. Strollo;Davide De Caro;Ettore Napoli;Nicola Petra;Gennaro Di Meo

2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2020 | Conference Paper |
Cited by: Papers (19)
In this paper we propose an energy-efficient approximate multiplier which uses a new approximate 4-2 compressor. The proposed compressor has a low error probability and its error conditions can be easily detected. This, as previously shown in the literature, makes it possible to implement error recovery, when the compressor is used in the partial product reduction phase of a multiplier. Simulation...Show More

Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor

Antonio G. M. Strollo;Davide De Caro;Ettore Napoli;Nicola Petra;Gennaro Di Meo

Year: 2020 | Conference Paper |

A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate

Ettore Napoli;Davide De Caro;Nicola Petra;Antonio G. M. Strollo

2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2020 | Conference Paper |
Video processing requires an increasing amount of buffered data. The paper proposes a multi-line buffer circuit that stores compressed data thus saving logic and power. The lossy compression algorithm provides the output stream with a fixed, decided by the user, delay from the input stream. Further, the amount of memory of the compressed buffer can be designed to trade off the correctness of the o...Show More

A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate

Ettore Napoli;Davide De Caro;Nicola Petra;Antonio G. M. Strollo

Year: 2020 | Conference Paper |

A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications

Davide De Caro;Gennaro Di Meo;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2020 | Volume: 67, Issue: 11 | Journal Article |
Cited by: Papers (5)
The increase of clock frequency in digital circuits exacerbates the electromagnetic interference (EMI) between devices. Spread-spectrum techniques reduce the electromagnetic noise lowering harmonic peaks of the clock signal by means of frequency modulation. In System-on-Chips (SoCs) another requirement in many applications is the coexistence of both modulated and un-modulated clock domains. In the...Show More

A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications

Davide De Caro;Gennaro Di Meo;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

Year: 2020 | Volume: 67, Issue: 11 | Journal Article |

Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers

Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra;Gennaro Di Meo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2020 | Volume: 67, Issue: 9 | Journal Article |
Cited by: Papers (196)
Approximate multipliers attract a large interest in the scientific literature that proposes several circuits built with approximate 4-2 compressors. Due to the large number of proposed solutions, the designer who wishes to use an approximate 4-2 compressor is faced with the problem of selecting the right topology. In this paper, we present a comprehensive survey and comparison of approximate 4-2 c...Show More

Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers

Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra;Gennaro Di Meo

Year: 2020 | Volume: 67, Issue: 9 | Journal Article |

A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate

Ettore Napoli;Davide De Caro;Nicola Petra;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2020 | Volume: 67, Issue: 1 | Journal Article |
Video processing requires an increasing amount of buffered data. The paper proposes a multi-line buffer circuit that stores compressed data thus saving logic and power. The lossy compression algorithm provides the output stream with a fixed, decided by the user, delay from the input stream. Further, the amount of memory of the compressed buffer can be designed to trade off the correctness of the o...Show More

A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate

Ettore Napoli;Davide De Caro;Nicola Petra;Antonio Giuseppe Maria Strollo

Year: 2020 | Volume: 67, Issue: 1 | Journal Article |

A Time Base Option for Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes

Mauro D’Arco;Ettore Napoli;Leopoldo Angrisani

IEEE Transactions on Instrumentation and Measurement
Year: 2020 | Volume: 69, Issue: 6 | Journal Article |
Cited by: Papers (8)
The design and implementation of a time base system that allows arbitrary selection of the sample rate in digital storage scopes with very fine frequency resolution is presented. The proposed solution relies on a suitable memory management strategy and a short digital filter with dynamically generated coefficients. It represents an alternative to the use of external clocks, which, due to the bandw...Show More

A Time Base Option for Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes

Mauro D’Arco;Ettore Napoli;Leopoldo Angrisani

Year: 2020 | Volume: 69, Issue: 6 | Journal Article |

Quality-Scalable Approximate LMS Filter

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Antonio G. M. Strollo;Ettore Napoli

2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Year: 2018 | Conference Paper |
Cited by: Papers (8)
Approximate Computing allows improving circuits performances by accepting inaccuracies in the calculations. Adaptive Least Mean Squares (LMS) filters can benefit from Approximate Computing, since they are inherently inexact and power-hungry. In this paper we propose a Quality-Scalable approximate LMS filter, in which it is possible to change the approximation level at runtime, by acting on an exte...Show More

Quality-Scalable Approximate LMS Filter

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Antonio G. M. Strollo;Ettore Napoli

Year: 2018 | Conference Paper |

Switched Capacitor Charge Pump Voltage-Controlled Current Source

Luca Avallone;Ettore Napoli;Michael Peter Kennedy

2018 29th Irish Signals and Systems Conference (ISSC)
Year: 2018 | Conference Paper |
Cited by: Papers (1)
This manuscript describes a switched-capacitor current source for applications such as driving high brightness LEDs and lasers. By introducing a third phase of operation into a two-phase charge pump DC-DC converter, the proposed design offers a potential solution to the excessive power typically consumed in regulating the diode or laser current. This results in a highly integrable voltage-to-curre...Show More

Switched Capacitor Charge Pump Voltage-Controlled Current Source

Luca Avallone;Ettore Napoli;Michael Peter Kennedy

Year: 2018 | Conference Paper |

A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability

Michele De Martino;Davide De Caro;Darjn Esposito;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2018 | Volume: 65, Issue: 11 | Journal Article |
Cited by: Papers (19)
The use of digital pulse-width modulators (DPWMs) as controllers for dc-dc converters is becoming more and more popular, due to the lower sensitivity to process variations, programmability, and easiness to translate complex control algorithm in digital architecture. DPWMs require high resolution to avoid limit cycling. Moreover, especially in high-frequency switching power converters, the reductio...Show More

A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability

Michele De Martino;Davide De Caro;Darjn Esposito;Ettore Napoli;Nicola Petra;Antonio Giuseppe Maria Strollo

Year: 2018 | Volume: 65, Issue: 11 | Journal Article |

Stall-Aware Fixed-Point Implementation of LMS Filters

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G. M. Strollo

2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
Year: 2018 | Conference Paper |
Cited by: Papers (1)
Least-Mean-Square (LMS) is the most popular adaptive filtering algorithm, due to its numerical stability, satisfactory steady-state error and relatively low computational complexity. LMS algorithm is commonly employed in a multitude of tasks such as channel equalization, adaptive noise cancellation, system identification and frequency tracking. Owing to its computational complexity, LMS algorithm ...Show More

Stall-Aware Fixed-Point Implementation of LMS Filters

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G. M. Strollo

Year: 2018 | Conference Paper |

Approximate Multipliers Based on New Approximate Compressors

Darjn Esposito;Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2018 | Volume: 65, Issue: 12 | Journal Article |
Cited by: Papers (211)
Approximate computing is an emerging trend in digital design that trades off the requirement of exact computation for improved speed and power performance. This paper proposes novel approximate compressors and an algorithm to exploit them for the design of efficient approximate multipliers. By using the proposed approach, we have synthesized approximate multipliers for several operand lengths usin...Show More

Approximate Multipliers Based on New Approximate Compressors

Darjn Esposito;Antonio Giuseppe Maria Strollo;Ettore Napoli;Davide De Caro;Nicola Petra

Year: 2018 | Volume: 65, Issue: 12 | Journal Article |

On the Use of Approximate Multipliers in LMS Adaptive Filters

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Nicola Petra;Ettore Napoli;Antonio G. M. Strollo

2018 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2018 | Conference Paper |
Cited by: Papers (9)
Approximate computing relaxes algorithm precision constraints to improve digital circuit performance. Adaptive filters based on least-mean-square (LMS) algorithm constitute a standard in many DSP applications. The LMS algorithm, being an approximation of the Wiener filter, is inherently imprecise, and constitutes a fertile ground to employ approximate hardware techniques with the additional challe...Show More

On the Use of Approximate Multipliers in LMS Adaptive Filters

Darjn Esposito;Gennaro Di Meo;Davide De Caro;Nicola Petra;Ettore Napoli;Antonio G. M. Strollo

Year: 2018 | Conference Paper |

On the use of approximate adders in carry-save multiplier-accumulators

Darjn Esposito;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G. M. Strollo

2017 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2017 | Conference Paper |
Approximate computing improves digital circuit performance by relaxing the requirement of performing exact calculations. In this paper, we investigate the use of approximate adders in the final stage of a carry save multiplier-accumulator (MAC), designed for image filtering application. We propose a design flow based on synthesis tools, starting from HDL description. After a first step in which an...Show More

On the use of approximate adders in carry-save multiplier-accumulators

Darjn Esposito;Davide De Caro;Ettore Napoli;Nicola Petra;Antonio G. M. Strollo

Year: 2017 | Conference Paper |

Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise

Ettore Napoli;Gerardo Castellano;Davide De Caro;Darjn Esposito;Nicola Petra;Antonio Giuseppe Maria Strollo

IEEE Transactions on Circuits and Systems I: Regular Papers
Year: 2017 | Volume: 64, Issue: 5 | Journal Article |
Cited by: Papers (1)
The generation of complex signal sources is important for test and validation of electronic systems. With reference to noise sources, commercial systems usually provide white noise sources, while the scientific literature only recently proposed circuits that generate programmable colored noise. This paper proposes a filtering circuit and an algorithm to design the same that produces an arbitrary c...Show More

Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise

Ettore Napoli;Gerardo Castellano;Davide De Caro;Darjn Esposito;Nicola Petra;Antonio Giuseppe Maria Strollo

Year: 2017 | Volume: 64, Issue: 5 | Journal Article |

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