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Author details

Yaşar Becerikli

Also published under: Yaşar Beceri̇kli̇, Yasar Becerikli, Yajar Becerikli, Y. Becerikli

Publications

25

Citations

297

Publications by Year

19972024

Co-Authors:

Fulya Akdeni̇zAyça BademF. CoskunCem ErginA. Ferit Konar

Show All Co-Authors (27)

Yaşar Becerikli

Also published under: Yaşar Beceri̇kli̇, Yasar Becerikli, Yajar Becerikli, Y. Becerikli

Affiliation

Kocaeli Üniversitesi

Bilgisayar Mühendisliği

Kocaeli, Türkiye

Adli Bilişim İhtisas Dairesi

Adli Tıp Kurumu

İstanbul, Türkiye

Publication Topics

Convolutional Neural Network,
Hardware Accelerators,
Least Significant Bit,
Resource Efficiency,
Wall Street Journal,
Acceleration Performance,
AlexNet,
Audio Data,
Audio Recordings,
Autocorrelation Method,
Biometric Data,
Bit-shift

Biography

Yasar Becerikli (S'95–A'01) received the B.S. (Hons.) degree from the Electronics and Communication Engineering Department, Yildiz Technical University, Istanbul, Turkey, in 1991, the M.S. degree from the Electronics and Communication Engineering Department, Istanbul Technical University, Istanbul, Turkey, in 1994, and the Ph.D. degree from the Electrical and Electronics Engineering Department, Sakarya University, Sakarya, Turkey, in 1998.,He was a Research Assistant at Sakarya University, from 1992 to 2000. He currently is an Assistant Professor of Computer Engineering, Kocaeli University, Izmit, Turkey. He also is a Senior Researcher at Marmara Research Center (MRC), Tubitak, Izmit, Turkey. His current research interests include intellige...

Publications

25

Citations

297

Publications by Year

19972024

Co-Authors:

Fulya Akdeni̇z
Ayça Badem
F. Coskun
Cem Ergin
A. Ferit Konar

Show All Co-Authors (27)

Author's Published Works

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Showing 1-25 of 59 results

Conferences (55)

Journals (3)

Magazines (1)

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Norman Chang(41)
N. Chang(15)
Lang Lin(14)
Ying-Shiun Li(12)
Akhilesh Kumar(11)
Hewlett Packard Laboratories, Palo Alto, CA, USA(10)
Ansys Inc., San Jose, CA, USA(4)
Ansys Inc.(3)
Ansys Inc., USA(3)
Kobe University(2)
2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)(2)
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014(2)
Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design(2)
1992 Symposium on VLSI Technology Digest of Technical Papers(1)
1997 Proceedings 47th Electronic Components and Technology Conference(1)
IEEE(59)
San Jose, CA, USA(10)
San Francisco, CA, USA(5)
San Diego, CA, USA(3)
Tucson, AZ, USA(3)
Anaheim, CA, USA(2)
Power Map(12)
Thermal Analysis(12)
Metal Layer(10)
Voltage Drop(10)
Printed Circuit Board(9)

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Results

Innovative Thermal Solutions for 3D Heterogeneous Integration of Co-Packaged Optics

Tianhao Zhang;Guoli Yin;Wenbo Xia;Norman Chang;Lang Lin;Huangjin Zhao;Qinglian Li

2024 IEEE International Integrated Reliability Workshop (IIRW)

Year: 2024 | Conference Paper |

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3D Heterogeneous Integration (3DHI) of copackaged optics (CPO) emerges as a promising low-power, lowlatency, and high-bandwidth IO solution for the ever-growing datacenter, AI and IoT applications. However, the design and co-optimization of heterogeneous integration of electrical and photonics system is very challenging by multiscale modeling and multiphysics integrity concerns. In this work, a no...Show More

Innovative Thermal Solutions for 3D Heterogeneous Integration of Co-Packaged Optics

Tianhao Zhang;Guoli Yin;Wenbo Xia;Norman Chang;Lang Lin;Huangjin Zhao;Qinglian Li

2024 IEEE International Integrated Reliability Workshop (IIRW)

Year: 2024 | Conference Paper |

A Hybrid Simulation Approach for Accurate and Fast System-Level Side-Channel Leakage Evaluation

Kazuki Monta;Takafumi Oki;Rikuu Hasegawa;Takuya Wadatsumi;Takuji Miki;Makoto Nagata;Lang Lin;Norman Chang

2024 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)

Year: 2024 | Conference Paper |

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Generally, the tolerance of cryptographic modules implemented in application-specific ICs (ASICs) to side-channel (SC) attacks is evaluated after the silicon manufacturing stage. This post-silicon assessment presents two significant challenges. First, manufacturing ASIC chips is both costly and time-consuming. Second, while post-silicon evaluation can determine the effectiveness of countermeasures...Show More

A Hybrid Simulation Approach for Accurate and Fast System-Level Side-Channel Leakage Evaluation

Kazuki Monta;Takafumi Oki;Rikuu Hasegawa;Takuya Wadatsumi;Takuji Miki;Makoto Nagata;Lang Lin;Norman Chang

2024 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)

Year: 2024 | Conference Paper |

Si-Backside Side-Channel Leakage Measurement and Simulation

Rikuu Hasegawa;Kazuki Monta;Takuya Wadatsumi;Takuji Miki;Makoto Nagata;Lang Lin;Akhilesh Kumar;Norman Chang

2024 21st International SoC Design Conference (ISOCC)

Year: 2024 | Conference Paper |

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Integrated circuit (IC) chips equipped with crypto circuits are susceptible to side-channel (SC) attacks that exploit SC information derived from the operation of the crypto circuit to reveal the secret keys. In this paper, we focus on the Si substrate voltage on the backside of the IC chip. The use of flip-chip implementations has led to the emergence of a new threat: direct probing attacks on th...Show More

Si-Backside Side-Channel Leakage Measurement and Simulation

Rikuu Hasegawa;Kazuki Monta;Takuya Wadatsumi;Takuji Miki;Makoto Nagata;Lang Lin;Akhilesh Kumar;Norman Chang

2024 21st International SoC Design Conference (ISOCC)

Year: 2024 | Conference Paper |

Parallel Per-tile Activation with Linear Superposition of Thermal Response for Solving Arbitrary Power Pattern in 3DIC Thermal Simulation

Haiyang He;Norman Chang;Akhilesh Kumar;Jie Yang;Wenbo Xia;Lang Lin;Jessica Yen;Haoliang Jiang;Rishikesh Ranade

2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD)

Year: 2024 | Conference Paper |

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A large on-chip peak temperature and thermal gradient, caused by localized hotspots and cross-die thermal coupling, can severely impact transistor performance, stress, aging, electromigration (EM), voltage drops, and timing. Generating static and transient chip thermal profiles with traditional FEM/CFD methods have prohibitively expensive computational requirements, especially for three-dimensiona...Show More

Parallel Per-tile Activation with Linear Superposition of Thermal Response for Solving Arbitrary Power Pattern in 3DIC Thermal Simulation

Haiyang He;Norman Chang;Akhilesh Kumar;Jie Yang;Wenbo Xia;Lang Lin;Jessica Yen;Haoliang Jiang;Rishikesh Ranade

2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD)

Year: 2024 | Conference Paper |

Modeling and Analysis of On-Chip Voltage Fluctuations Caused by Electromagnetic Fault Injection

Takuya Wadatsumi;Rikuu Hasegawa;Kazuki Monta;Takuji Miki;Lang Lin;Norman Chang;Makoto Nagata

2024 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)

Year: 2024 | Conference Paper |

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Near-field electromagnetic fault injection (EMFI) is one of the most commonly used attack methods to intentionally cause errors in digital circuits due to its inherent advantages. A full-wave simulator was used to analyze the voltage fluctuations on the on-chip power mesh excited by EMFI. We have described the relationship in which the shape of the voltage fluctuations on the power mesh inside ICs...Show More

Modeling and Analysis of On-Chip Voltage Fluctuations Caused by Electromagnetic Fault Injection

Takuya Wadatsumi;Rikuu Hasegawa;Kazuki Monta;Takuji Miki;Lang Lin;Norman Chang;Makoto Nagata

2024 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)

Year: 2024 | Conference Paper |

Novel Preprocessing Technique for Data Embedding in Engineering Code Generation Using Large Language Model

Yu-Chen Lin;Akhilesh Kumar;Norman Chang;Wenliang Zhang;Muhammad Zakir;Rucha Apte;Haiyang He;Chao Wang;Jyh-Shing Roger Jang

2024 IEEE LLM Aided Design Workshop (LAD)

Year: 2024 | Conference Paper |

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We introduce four principal contributions to augment the capabilities of Large Language Models (LLMs) in generating domain-specific code: (i) leveraging LLM-based data splitting and data renovation techniques to refine the semantic representation within the embedding space; (ii) proposing an effective method for refactoring existing scripts, enabling the generation of new and high-quality scripts ...Show More

Novel Preprocessing Technique for Data Embedding in Engineering Code Generation Using Large Language Model

Yu-Chen Lin;Akhilesh Kumar;Norman Chang;Wenliang Zhang;Muhammad Zakir;Rucha Apte;Haiyang He;Chao Wang;Jyh-Shing Roger Jang

2024 IEEE LLM Aided Design Workshop (LAD)

Year: 2024 | Conference Paper |

Thermal-Aware Test Frequency Optimization

Wei-Shen Wang;Zhe-Jia Liang;James Chien-Mo Li;Norman Chang;Akhilesh Kumar;Ying-Shiun Li

2024 IEEE International Test Conference in Asia (ITC-Asia)

Year: 2024 | Conference Paper |

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Thermal issues during testing of Very Large Scale Integration (VLSI) chips have become more severe as design complexity increases. Test frequency optimization is needed because high test frequencies can cause thermal damage to circuits under test (CUT), while low test frequencies can result in long test time. In this paper, we propose three techniques to minimize the test time of ATPG scan tests w...Show More

Thermal-Aware Test Frequency Optimization

Wei-Shen Wang;Zhe-Jia Liang;James Chien-Mo Li;Norman Chang;Akhilesh Kumar;Ying-Shiun Li

2024 IEEE International Test Conference in Asia (ITC-Asia)

Year: 2024 | Conference Paper |

Solving 3D-IC Multiphysics Challenges with a Novel ML-Assisted Co-Optimization Methodology

Lang Lin;Tianhao Zhang;Qinglian Li;Lei Yin;Norman Chang

2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)

Year: 2024 | Conference Paper |

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The emerging 3D-IC systems, enabled by advanced packaging techniques, promise high integration density and manufacturing yield to keep Moore's Law thriving. However, due to the complexity of heterogeneous integration of various chiplets into the chip-package-system, applications built upon 3D-IC are challenged by power integrity, signal integrity, thermal integrity, and structural integrity issues...Show More

Solving 3D-IC Multiphysics Challenges with a Novel ML-Assisted Co-Optimization Methodology

Lang Lin;Tianhao Zhang;Qinglian Li;Lei Yin;Norman Chang

2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)

Year: 2024 | Conference Paper |

Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-Channel Simulation

Henian Li;Lang Lin;Norman Chang;Sreeja Chowdhury;Dylan Mcguire;Bozidar Novakovic;Kazuki Monta;Makoto Nagata;Ying–Shiun Li;Pramod M S;Piin–Chen Yeh;J.–S. Roger Jang;Chengjie Xi;Qiutong Jin;Navid Asadi;Mark Tehranipoor

2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2024 | Conference Paper |

Cited by: Papers (1)

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Optical side-channel analysis poses a significant threat to the security of integrated circuits (ICs) by enabling the disclosure of secret data, such as encryption keys. In this paper, for the first time, we present a multiphysics simulation framework of optical side-channel analysis from the layout database of a fabricated testchip. By leveraging accurate device models and electro-photonic physic...Show More

Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-Channel Simulation

Henian Li;Lang Lin;Norman Chang;Sreeja Chowdhury;Dylan Mcguire;Bozidar Novakovic;Kazuki Monta;Makoto Nagata;Ying–Shiun Li;Pramod M S;Piin–Chen Yeh;J.–S. Roger Jang;Chengjie Xi;Qiutong Jin;Navid Asadi;Mark Tehranipoor

2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2024 | Conference Paper |

Integrated Process-Mechanical Stress Analysis of 2.5D/3D ICs with Two Types of Interconnections in Advanced Packaging

Bo Ren;C. T. Wu;Wei Hu;Xiaofei Pan;Dandan Lyu;Norman Chang

2023 IEEE International Integrated Reliability Workshop (IIRW)

Year: 2023 | Conference Paper |

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Soldering and Cu/Cu direct bonding are the two main interconnection approaches in 2.5D/3D ICs advance packaging. The manufacture process of these joints determines the joint quality and has impacts on chip/device performance and reliability. For soldering, this paper proposed a multiscale framework to introduce the influence of solder ball reflow process to further shock reliability simulation. Fo...Show More

Integrated Process-Mechanical Stress Analysis of 2.5D/3D ICs with Two Types of Interconnections in Advanced Packaging

Bo Ren;C. T. Wu;Wei Hu;Xiaofei Pan;Dandan Lyu;Norman Chang

2023 IEEE International Integrated Reliability Workshop (IIRW)

Year: 2023 | Conference Paper |

High-Speed, Low-Storage Power and Thermal Predictions for ATPG Test Patterns

Zhe-Jia Liang;Yu-Tsung Wu;Yun-Feng Yang;James Chien-Mo Li;Norman Chang;Akhilesh Kumar;Ying-Shiun Li

2023 IEEE International Test Conference (ITC)

Year: 2023 | Conference Paper |

Cited by: Papers (1)

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High test power causes thermal damage to chips under test. We need power and thermal analyses to ensure thermal safety of ATPG patterns. This requires long runtime and large disk storage because there are many cycles in ATPG patterns. In this paper, we propose power and thermal predictions for test applications. To save runtime, we use multiple ML models and decay surface models for power and ther...Show More

High-Speed, Low-Storage Power and Thermal Predictions for ATPG Test Patterns

Zhe-Jia Liang;Yu-Tsung Wu;Yun-Feng Yang;James Chien-Mo Li;Norman Chang;Akhilesh Kumar;Ying-Shiun Li

2023 IEEE International Test Conference (ITC)

Year: 2023 | Conference Paper |

Invited Paper: Solving Fine-Grained Static 3DIC Thermal with ML Thermal Solver Enhanced with Decay Curve Characterization

Haiyang He;Norman Chang;Jie Yang;Akhilesh Kumar;Wenbo Xia;Lang Lin;Rishikesh Ranade

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

Year: 2023 | Conference Paper |

Cited by: Papers (3)

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Static chip thermal analysis provides detailed and accurate thermal profile on chip. The chip power map, commonly modeled as rectangular regions of distinct heat sources, significantly impacts the chip thermal profile. Since the heat sources result from numerous cells in functional blocks, the design space of chip power map is prohibitively enormous. Numerical simulations can be reliable for solvi...Show More

Invited Paper: Solving Fine-Grained Static 3DIC Thermal with ML Thermal Solver Enhanced with Decay Curve Characterization

Haiyang He;Norman Chang;Jie Yang;Akhilesh Kumar;Wenbo Xia;Lang Lin;Rishikesh Ranade

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

Year: 2023 | Conference Paper |

ML-augmented Simulation and Co-optimization for Semiconductor Applications and Design WorkflowsBeyond

2023 ACM/IEEE 5th Workshop on Machine Learning for CAD (MLCAD)

Year: 2023 | Conference Paper |

Cited by: Papers (1)

Machine Learning technology has been extensively used across engineering simulations, especially for Semiconductor and Electronics applications. Ansys provides an open and extendable framework through PyAnsys on all tools to facilitate customers building customized ML applications. Furthermore, optiSLang, an Auto-ML optimization tool, can be used not only with Ansys multiphysics tools but also wit...Show More

ML-augmented Simulation and Co-optimization for Semiconductor Applications and Design WorkflowsBeyond

2023 ACM/IEEE 5th Workshop on Machine Learning for CAD (MLCAD)

Year: 2023 | Conference Paper |

A Thermal Machine Learning Solver For Chip Simulation

Rishikesh Ranade;Haiyang He;Jay Pathak;Norman Chang;Akhilesh Kumar;Jimin Wen

2022 ACM/IEEE 4th Workshop on Machine Learning for CAD (MLCAD)

Year: 2022 | Conference Paper |

Cited by: Papers (6)

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Thermal analysis provides deeper insights into electronic chips’ behavior under different temperature scenarios and enables faster design exploration. However, obtaining detailed and accurate thermal profile on chip is very time-consuming using FEM or CFD. Therefore, there is an urgent need for speeding up the on-chip thermal solution to address various system scenarios. In this paper, we propose ...Show More

A Thermal Machine Learning Solver For Chip Simulation

Rishikesh Ranade;Haiyang He;Jay Pathak;Norman Chang;Akhilesh Kumar;Jimin Wen

2022 ACM/IEEE 4th Workshop on Machine Learning for CAD (MLCAD)

Year: 2022 | Conference Paper |

Layout-level Vulnerability Ranking from Electromagnetic Fault Injection

Lang Lin;Jimin Wen;Harsh Shrivastav;Weike Li;Hua Chen;Gang Ni;Sreeja Chowdhury;Calvin Chow;Norman Chang

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2022 | Conference Paper |

Cited by: Papers (3)

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Trusted microelectronics are increasingly threatened by fault injection attacks through a variety of physical means. Electromagnetic fault injection (EMFI) is a low-cost but effective approach to induce parasitic currents on a victim chip. To address the gap between logic fault principle and silicon EMFI mechanism, a layout-level simulation methodology to identify physical vulnerabilities of the v...Show More

Layout-level Vulnerability Ranking from Electromagnetic Fault Injection

Lang Lin;Jimin Wen;Harsh Shrivastav;Weike Li;Hua Chen;Gang Ni;Sreeja Chowdhury;Calvin Chow;Norman Chang

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2022 | Conference Paper |

Security Properties Driven Pre-Silicon Laser Fault Injection Assessment

Nitin Pundir;Henian Li;Lang Lin;Norman Chang;Farimah Farahmandi;Mark Tehranipoor

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2022 | Conference Paper |

Cited by: Papers (8)

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Laser fault injection (LFI) is a formidable physical attack due to its tremendous efficacy, high controllability, and precision. As a result, efforts to simulate laser effects have been undertaken in the literature to study its impact on digital designs. However, most of these efforts either model laser effects on standalone standard cells without considering the impact of layout parameters or pro...Show More

Security Properties Driven Pre-Silicon Laser Fault Injection Assessment

Nitin Pundir;Henian Li;Lang Lin;Norman Chang;Farimah Farahmandi;Mark Tehranipoor

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2022 | Conference Paper |

On-Chip Transient Hot Spot Detection with a Multiscale ROM in 3DIC Designs

David Geb;Saeed Asgari;Akhilesh Kumar;Jimin Wen;Norman Chang;Stephen Pan;Mehdi Abarham;Haiyang He;Viral Gandhi

2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)

Year: 2022 | Conference Paper |

Cited by: Papers (3)

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Limitations in traditional methods of thermal analysis call for novel methods to meet emerging needs for chip thermal simulation. The goal in this work is to describe a method to perform transient thermal simulations on chips in multi-chip systems and 3DIC packages, while accomplishing the following key objectives: (1) Capture on-chip hot spots with fine-grain resolution (2) Account for system-lev...Show More

On-Chip Transient Hot Spot Detection with a Multiscale ROM in 3DIC Designs

David Geb;Saeed Asgari;Akhilesh Kumar;Jimin Wen;Norman Chang;Stephen Pan;Mehdi Abarham;Haiyang He;Viral Gandhi

2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)

Year: 2022 | Conference Paper |

Low-IR-Drop Test Pattern Regeneration Using A Fast Predictor

Shi-Tang Liu;Jia-Xian Chen;Yu-Tsung Wu;Chao-Ho Hsieh;Chien-Mo Li;Norman Chang;Ying-Shiun Li;Wen-Tze Chuang

2022 23rd International Symposium on Quality Electronic Design (ISQED)

Year: 2022 | Conference Paper |

Cited by: Papers (2)

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IR-drop becomes an important issue for testing in advanced technology nodes. In this paper, we propose a low-IR-drop test pattern regeneration to produce IR-drop-safe patterns. To speed up IR-drop analysis, we apply an existing machine learning model to predict IR-drop of test patterns. Because we already know the IR-drop of test patterns, we learn from test patterns to determine low-IR-drop prefe...Show More

Low-IR-Drop Test Pattern Regeneration Using A Fast Predictor

Shi-Tang Liu;Jia-Xian Chen;Yu-Tsung Wu;Chao-Ho Hsieh;Chien-Mo Li;Norman Chang;Ying-Shiun Li;Wen-Tze Chuang

2022 23rd International Symposium on Quality Electronic Design (ISQED)

Year: 2022 | Conference Paper |

ML-based Fast On-Chip Transient Thermal Simulation for Heterogeneous 2.5D/3D IC Designs

Akhilesh Kumar;Norman Chang;David Geb;Haiyang He;Stephen Pan;Jimin Wen;Saeed Asgari;Mehdi Abarham;Chris Ortiz

2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Year: 2022 | Conference Paper |

Cited by: Papers (12)

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Large 3DIC designs with multiple chips require several iterations of transient thermal analysis particularly for fine-grain on-chip dynamic thermal management. This requires a fast thermal analysis technology as opposed to traditional CFD/FEA based methods which have severe runtime/capacity limitations for large chips (e.g., 2cmx2cm) in 3DIC while generating fine grained (e.g., 10umx10um) transien...Show More

ML-based Fast On-Chip Transient Thermal Simulation for Heterogeneous 2.5D/3D IC Designs

Akhilesh Kumar;Norman Chang;David Geb;Haiyang He;Stephen Pan;Jimin Wen;Saeed Asgari;Mehdi Abarham;Chris Ortiz

2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

Year: 2022 | Conference Paper |

Vector-based Dynamic IR-drop Prediction Using Machine Learning

Jia-Xian Chen;Shi-Tang Liu;Yu-Tsung Wu;Mu-Ting Wu;Chieo-Mo Li;Norman Chang;Ying-Shiun Li;Wen-Tze Chuang

2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)

Year: 2022 | Conference Paper |

Cited by: Papers (7)

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Vector-based dynamic IR-drop analysis of the entire vector set is infeasible due to long runtime. In this paper, we use machine learning to perform vector-based IR drop prediction for all logic cells in the circuit. We extract important features, such as toggle counts and arrival time, directly from the logic simulation waveform so that we can perform vector-based IR-drop prediction quickly. We al...Show More

Vector-based Dynamic IR-drop Prediction Using Machine Learning

Jia-Xian Chen;Shi-Tang Liu;Yu-Tsung Wu;Mu-Ting Wu;Chieo-Mo Li;Norman Chang;Ying-Shiun Li;Wen-Tze Chuang

2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)

Year: 2022 | Conference Paper |

Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification

Lang Lin;Deqi Zhu;Jimin Wen;Hua Chen;Yu Lu;Norman Chang;Calvin Chow;Harsh Shrivastav;Chia-Wei Chen;Kazuki Monta;Makoto Nagata

2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2021 | Conference Paper |

Cited by: Papers (11)

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The silicon substrate backside of modern ICs is increasingly recognized as a critical hardware vulnerability, which opens a backdoor for laser/optical probing, fault injection and side-channel attacks. In this work, a novel multiphysics simulation framework is proposed to assess near-field electromagnetic (EM) side-channel leakage. By modeling cell-level power, chip logic functionality and layout ...Show More

Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification

Lang Lin;Deqi Zhu;Jimin Wen;Hua Chen;Yu Lu;Norman Chang;Calvin Chow;Harsh Shrivastav;Chia-Wei Chen;Kazuki Monta;Makoto Nagata

2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

Year: 2021 | Conference Paper |

ML-augmented Methodology for Fast Thermal Side-channel Emission Analysis

Norman Chang;Deqi Zhu;Lang Lin;Dinesh Selvakumaran;Jimin Wen;Stephen Pan;Wenbo Xia;Hua Chen;Calvin Chow;Gary Chen

2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)

Year: 2021 | Conference Paper |

Cited by: Papers (2)

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Accurate side-channel attacks can non-invasively or semi-invasively extract secure information from hardware devices using "side- channel" measurements. The thermal profile of an IC is one class of side channel that can be used to exploit the security weaknesses in a design. Measurement of junction temperature from an on-chip thermal sensor or top metal layer temperature using an infrared thermal ...Show More

ML-augmented Methodology for Fast Thermal Side-channel Emission Analysis

Norman Chang;Deqi Zhu;Lang Lin;Dinesh Selvakumaran;Jimin Wen;Stephen Pan;Wenbo Xia;Hua Chen;Calvin Chow;Gary Chen

2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)

Year: 2021 | Conference Paper |

Fast and Comprehensive Simulation Methodology for Layout-Based Power-Noise Side-Channel Leakage Analysis

Lang Lin;Dinesh Selvakumaran;Deqi Zhu;Norman Chang;Calvin Chow;Makoto Nagata;Kazuki Monta

2020 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)

Year: 2020 | Conference Paper |

Cited by: Papers (9)

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Side-channel attacks can non-invasively extract secret information from hardware devices with a large number of “side-channel” measurements. For example, measuring the dynamic voltage drop of a cryptographic chip can disclose the secret keys by power-noise side-channel emission. To identify the design vulnerabilities and to verify the design countermeasures against side-channel attacks, design tim...Show More

Fast and Comprehensive Simulation Methodology for Layout-Based Power-Noise Side-Channel Leakage Analysis

Lang Lin;Dinesh Selvakumaran;Deqi Zhu;Norman Chang;Calvin Chow;Makoto Nagata;Kazuki Monta

2020 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)

Year: 2020 | Conference Paper |

Efficient ESD Generator Modeling Using Reinforcement Learning

Akhilesh Kumar;En-Cih Yang;Ming-Chih Shih;Ying-Shiun Li;Wen-Tze Chuang;Norman Chang

2020 42nd Annual EOS/ESD Symposium (EOS/ESD)

Year: 2020 | Conference Paper |

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This paper describes Reinforcement Learning (RL) based technique for estimating the parameters of ESD generators modeled using circuit templates, given the current discharge waveform. The proposed algorithms can be applied to any circuit template to tune the circuit parameters for the desired application or optimization efficiently with minimum prior knowledge. The model can then be used in system...Show More

Efficient ESD Generator Modeling Using Reinforcement Learning

Akhilesh Kumar;En-Cih Yang;Ming-Chih Shih;Ying-Shiun Li;Wen-Tze Chuang;Norman Chang

2020 42nd Annual EOS/ESD Symposium (EOS/ESD)

Year: 2020 | Conference Paper |

DNN-based Fast Static On-chip Thermal Solver

Jimin Wen;Stephen Pan;Norman Chang;Wen-Tze Chuang;Wenbo Xia;Deqi Zhu;Akhilesh Kumar;En-Cih Yang;Karthik Srinivasan;Ying-Shun Li

2020 36th Semiconductor Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)

Year: 2020 | Conference Paper |

Cited by: Papers (20)

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Accurate prediction of on-chip temperature distribution becomes important for the performance and reliability of upcoming 5G, automotive, and AI chip-package-systems. In particular, a large thermal gradient (the temperature variation across a chip) accelerates electromigration and aging, and also impacts design performance and power. Furthermore, there are usually Tmax (maximum temperature) constr...Show More

DNN-based Fast Static On-chip Thermal Solver

Jimin Wen;Stephen Pan;Norman Chang;Wen-Tze Chuang;Wenbo Xia;Deqi Zhu;Akhilesh Kumar;En-Cih Yang;Karthik Srinivasan;Ying-Shun Li

2020 36th Semiconductor Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)

Year: 2020 | Conference Paper |

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