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Cheng-Lin Tsao - IEEE Xplore Author Profile

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Author details

Cheng-Lin Tsao

Publications

4

Citations

68

Publications by Year

20082013

Co-Authors:

Sriram LakshmananWanjiun LiaoTsung-Nan LinRaghupathy SivakumarKarthikeyan Sundaresan

Show All Co-Authors (6)

Cheng-Lin Tsao

Affiliation

School of Electrical and Computer Engineering

Georgia Institute of Technology

Atlanta, GA, USA

Publication Topics

Multiple Access Points,
Orthogonal Frequency Division Multiplexing,
Wireless Networks,
Access Points,
Ad Hoc Networks,
Analytical Results,
Antenna Array,
Array Elements,
Average Loss Rate,
Base Station,
Bit Error Rate,
Bit Length

Biography

Cheng-Lin Tsao is working toward the PhD degree in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. His research interests are in the areas of wireless networks, mobile computing, and broadband networks. His homepage is at http://users.ece.gatech.edu/~cltsao.(Based on document published on 5 June 2012).

Publications

4

Citations

68

Publications by Year

20082013

Co-Authors:

Sriram Lakshmanan
Wanjiun Liao
Tsung-Nan Lin
Raghupathy Sivakumar
Karthikeyan Sundaresan

Show All Co-Authors (6)

Author's Published Works

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Showing 1-25 of 346 results

Conferences (230)

Journals (110)

Early Access Articles (4)

Magazines (2)

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State Key Laboratory of ASIC and System, Fudan University, Shanghai, China(106)
State Key Laboratory of ASIC & System, Fudan University, Shanghai, China(39)
State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China(21)
State Key Lab of ASIC & System, Fudan University, Shanghai, China(19)
State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China(13)
IEEE Transactions on Circuits and Systems II: Express Briefs(23)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems(15)
2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)(13)
2021 IEEE 14th International Conference on ASIC (ASICON)(13)
IEEE Transactions on Circuits and Systems I: Regular Papers(13)
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Kunming, China(21)
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Video Coding(45)
Energy Efficiency(41)
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Nighttime Glare Removal for Consumer Electronics via Latent Space Transformation and Feature Enhanced Attention Mechanism

Jiazheng Lian;Jiaming Liu;Ming’e Jing;Xiaoyang Zeng;Zherong Liu;Jun Zhou;Yibo Fan

IEEE Transactions on Consumer Electronics

Year: 2025 | Early Access Article |

Nighttime image flare occurs due to light bending through the lens, creating a high contrast between bright light sources and dark backgrounds, which degrades image quality. To address this, we propose FBNet (Flare Basis Latent Space Transformation Network), a novel network designed for efficient nighttime flare removal. FBNet employs a mapping-based self-attention mechanism to detect and eliminat...Show More

Nighttime Glare Removal for Consumer Electronics via Latent Space Transformation and Feature Enhanced Attention Mechanism

Jiazheng Lian;Jiaming Liu;Ming’e Jing;Xiaoyang Zeng;Zherong Liu;Jun Zhou;Yibo Fan

IEEE Transactions on Consumer Electronics

Year: 2025 | Early Access Article |

RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping

Mengjie Li;Yiming Zhang;Siqi He;Qi Liu;Xiaoyang Zeng;Chixiao Chen;Haozhe Zhu

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2025 | Early Access Article |

Simultaneous Localization and Mapping (SLAM) is pivotal for autonomous robotics, yet feature-based SLAM systems struggle with sparse environmental representations and robustness under dynamic conditions. Optical-flow-based SLAM (OpF-SLAM) addresses these limitations by leveraging pixel-level motion data for dense mapping; however, its computational intensity hinders real-time deployment. This pape...Show More

RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping

Mengjie Li;Yiming Zhang;Siqi He;Qi Liu;Xiaoyang Zeng;Chixiao Chen;Haozhe Zhu

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2025 | Early Access Article |

An FPGA-Based Event-Driven SNN Accelerator for DVS Applications With Structured Sparsity and Early-Stop

Xi Cheng;Shu Cao;Shangmei Wang;Mingyu Wang;Wenhong Li;Xiaoyang Zeng

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2025 | Early Access Article |

This paper proposed an algorithm-hardware co-design of an event-driven spiking neural network (SNN) accelerator for classification tasks of event-based data from dynamic vision sensors (DVS), which can implement a feed-forward SNN with a maximum network size of 1 million synapses. Configurable structured sparsity is introduced between the first layer and the second layer to improve energy efficien...Show More

An FPGA-Based Event-Driven SNN Accelerator for DVS Applications With Structured Sparsity and Early-Stop

Xi Cheng;Shu Cao;Shangmei Wang;Mingyu Wang;Wenhong Li;Xiaoyang Zeng

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2025 | Early Access Article |

A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection

Tianxiang Qu;Xuecheng Yang;Biao Tang;Xiao Li;Min Chen;Zhiliang Hong;Xiaoyang Zeng;Jiawei Xu

IEEE Transactions on Biomedical Circuits and Systems

Year: 2025 | Early Access Article |

Motion artifacts (MA), common-mode interference (CMI), and varying electrode-tissue impedance (ETI) are the main factors that cause heart rate detection errors in practical wearable ECG acquisition. These problems are further exacerbated in two-electrode based ECG systems. This article presents an ambulatory ECG acquisition ASIC with fully integrated, low power motion artifacts removal (MAR) and h...Show More

A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection

Tianxiang Qu;Xuecheng Yang;Biao Tang;Xiao Li;Min Chen;Zhiliang Hong;Xiaoyang Zeng;Jiawei Xu

IEEE Transactions on Biomedical Circuits and Systems

Year: 2025 | Early Access Article |

Tensor Low-Rank Approximation via Plug-and-Play Priors for Anomaly Detection in Remote Sensing Images

Jingjing Liu;Manlong Feng;Xianchao Xiu;Xiaoyang Zeng;Jianhua Zhang

IEEE Transactions on Instrumentation and Measurement

Year: 2025 | Volume: 74 | Journal Article |

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Optical remote sensing images (RSIs) have received widespread attention in fields such as agricultural monitoring, mineral exploration, and military defense. However, the detection performance will be seriously degraded when interfered with by noise. To overcome this issue, we first present a novel method called tensor low-rank approximation (TLRA), which leverages the weighted tensor nuclear norm...Show More

Tensor Low-Rank Approximation via Plug-and-Play Priors for Anomaly Detection in Remote Sensing Images

Jingjing Liu;Manlong Feng;Xianchao Xiu;Xiaoyang Zeng;Jianhua Zhang

IEEE Transactions on Instrumentation and Measurement

Year: 2025 | Volume: 74 | Journal Article |

MATCNN: Infrared and Visible Image Fusion Method Based on Multiscale CNN With Attention Transformer

Jingjing Liu;Li Zhang;Xiaoyang Zeng;Wanquan Liu;Jianhua Zhang

IEEE Transactions on Instrumentation and Measurement

Year: 2025 | Volume: 74 | Journal Article |

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While attention-based approaches have shown considerable progress in enhancing image fusion and addressing the challenges posed by long-range feature dependencies, their efficacy in capturing local features is compromised by the lack of diverse receptive field extraction techniques. To overcome the shortcomings of existing fusion methods in extracting multiscale local features and preserving globa...Show More

MATCNN: Infrared and Visible Image Fusion Method Based on Multiscale CNN With Attention Transformer

Jingjing Liu;Li Zhang;Xiaoyang Zeng;Wanquan Liu;Jianhua Zhang

IEEE Transactions on Instrumentation and Measurement

Year: 2025 | Volume: 74 | Journal Article |

A Hardware-Friendly Lightweight Partition Decision Algorithm for VVC Intra and Inter Coding

Zhao Zan;Leilei Huang;Shushi Chen;Xiaoyang Zeng;Yibo Fan

IEEE Signal Processing Letters

Year: 2025 | Volume: 32 | Journal Article |

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The Versatile Video Coding (VVC) standard notably enhances encoding efficiency with the Quad-Tree plus Multi-Type Tree (QTMTT) partition structure. However, the complex QTMTT tool presents substantial challenges in both software and hardware implementation. To overcome those challenges, this paper introduces a hardware-friendly partition decision algorithm for VVC intra and inter coding. Firstly, ...Show More

A Hardware-Friendly Lightweight Partition Decision Algorithm for VVC Intra and Inter Coding

Zhao Zan;Leilei Huang;Shushi Chen;Xiaoyang Zeng;Yibo Fan

IEEE Signal Processing Letters

Year: 2025 | Volume: 32 | Journal Article |

Flips: A Flexible Partitioning Strategy Near Memory Processing Architecture for Recommendation System

Yudi Qiu;Lingfei Lu;Shiyan Yi;Minge Jing;Xiaoyang Zeng;Yang Kong;Yibo Fan

IEEE Transactions on Parallel and Distributed Systems

Year: 2025 | Volume: 36, Issue: 4 | Journal Article |

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Personalized recommendation systems are massively deployed in production data centers. The memory-intensive embedding layers of recommendation systems are the crucial performance bottleneck, with operations manifesting as sparse memory lookups and simple reduction computations. Recent studies propose near-memory processing (NMP) architectures to speed up embedding operations by utilizing high inte...Show More

Flips: A Flexible Partitioning Strategy Near Memory Processing Architecture for Recommendation System

Yudi Qiu;Lingfei Lu;Shiyan Yi;Minge Jing;Xiaoyang Zeng;Yang Kong;Yibo Fan

IEEE Transactions on Parallel and Distributed Systems

Year: 2025 | Volume: 36, Issue: 4 | Journal Article |

High Signal-to-Noise Ratio and High-Sensitivity 4-D LiDAR Imaging Receiver

Jianping Guo;Zhengping Gao;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2025 | Volume: 33, Issue: 5 | Journal Article |

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This brief designs and implements a 4-D imaging light detection and ranging (LiDAR) receiver. It employs a reconfigurable transimpedance amplifier (TIA) that alternates between two modes to separately achieve ranging and light intensity quantification functions. A new mode-switching method based on a monostable multivibrator is proposed, allowing the TIA to automatically switch modes during measur...Show More

High Signal-to-Noise Ratio and High-Sensitivity 4-D LiDAR Imaging Receiver

Jianping Guo;Zhengping Gao;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2025 | Volume: 33, Issue: 5 | Journal Article |

An 828-μW 100.9-dB SNDR 20-kHz BW Zoom-Linear-Exponential Incremental ADC With Split Positive Feedback and Duty-Cycle Amplifier

Lairong Fang;Shuwen Zhang;Xiaoyang Zeng;Zhiliang Hong;Jiawei Xu

IEEE Solid-State Circuits Letters

Year: 2025 | Volume: 8 | Journal Article |

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This letter presents a hybrid, three-step zoom-linear-exponential incremental analog-to-digital converter (ZLE-IADC) for audio applications. The zoom-SAR in the first step provides coarse signal quantization and relaxes the accuracy requirements of subsequent conversions. The second step utilizes a single-loop, first-order delta–sigma modulator (

$\Delta \Sigma$ M). In the third step, the $\Delt...Show More

An 828-μW 100.9-dB SNDR 20-kHz BW Zoom-Linear-Exponential Incremental ADC With Split Positive Feedback and Duty-Cycle Amplifier

Lairong Fang;Shuwen Zhang;Xiaoyang Zeng;Zhiliang Hong;Jiawei Xu

IEEE Solid-State Circuits Letters

Year: 2025 | Volume: 8 | Journal Article |

Affine Motion Estimation Hardware Implementation With 51.7%/67.5% Internal Bandwidth Reduction for Versatile Video Coding

Shushi Chen;Leilei Huang;Zhao Zan;Zhijian Hao;Hao Zhang;Xiaoxiang Chen;Minge Jing;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Circuits and Systems for Video Technology

Year: 2025 | Volume: 35, Issue: 4 | Journal Article |

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Versatile Video Coding (VVC) employs Affine Motion Compensation (AMC) to process scenes with high-order motion. To improve AMC efficiency, the Affine Motion Estimation (AME) process based on the gradient-based iterative algorithm (GIA) and block match algorithm (BMA) is introduced to the VVC Test Model (VTM). However, the AME process is highly complex and difficult for hardware implementation in r...Show More

Affine Motion Estimation Hardware Implementation With 51.7%/67.5% Internal Bandwidth Reduction for Versatile Video Coding

Shushi Chen;Leilei Huang;Zhao Zan;Zhijian Hao;Hao Zhang;Xiaoxiang Chen;Minge Jing;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Circuits and Systems for Video Technology

Year: 2025 | Volume: 35, Issue: 4 | Journal Article |

A 2 MHz Bandwidth TMR-Based Contactless Current Sensor With Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration

Tianxiang Qu;Tian Dong;Wenhui Qin;Yaohua Pan;Yun Sheng;Zhiliang Hong;Xiaoyang Zeng;Jiawei Xu

IEEE Journal of Solid-State Circuits

Year: 2025 | Volume: 60, Issue: 5 | Journal Article |

Cited by: Papers (1)

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This article presents a tunnel magnetoresistance (TMR)-based magnetic sensor for contactless current sensing. The TMR readout circuit utilizes a current-balancing instrumentation amplifier (CBIA) with ping-pong auto-zeroing (PPAZ), achieving an integrated magnetic noise of 206 nTrms in a wide bandwidth of 2 MHz. Compared with chopping amplifiers, an auto-zeroed CBIA provides a ripple-free output, ...Show More

A 2 MHz Bandwidth TMR-Based Contactless Current Sensor With Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration

Tianxiang Qu;Tian Dong;Wenhui Qin;Yaohua Pan;Yun Sheng;Zhiliang Hong;Xiaoyang Zeng;Jiawei Xu

IEEE Journal of Solid-State Circuits

Year: 2025 | Volume: 60, Issue: 5 | Journal Article |

Enhancing Efficiency in Piezoelectric Energy Harvesting: Collaborative-Flip Synchronized Switch Harvesting on Capacitors Rectifier and Multioutput DC-DC Converters Utilizing Shared Capacitors

Jing Wang;Yi Yang;Zhen Li;Sijun Du;Xinling Yue;Xun Liu;Jun Han;Xiaoyang Zeng;Zhiyuan Chen

IEEE Journal of Solid-State Circuits

Year: 2025 | Volume: 60, Issue: 4 | Journal Article |

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This article proposes a novel collaborative-flip synchronized switch harvesting on capacitors (CF-SSHCs) rectifier and multioutput synchronous dc-dc converters with shared capacitors. Compared to the traditional SSHC, our CF-SSHC rectifier can increase the number of flipping phases, potentially enhancing the flipping efficiency and output power under specific conditions where

$C_{\text {FLY}}$ i...Show More

Enhancing Efficiency in Piezoelectric Energy Harvesting: Collaborative-Flip Synchronized Switch Harvesting on Capacitors Rectifier and Multioutput DC-DC Converters Utilizing Shared Capacitors

Jing Wang;Yi Yang;Zhen Li;Sijun Du;Xinling Yue;Xun Liu;Jun Han;Xiaoyang Zeng;Zhiyuan Chen

IEEE Journal of Solid-State Circuits

Year: 2025 | Volume: 60, Issue: 4 | Journal Article |

An Interpolation-Free Fractional Motion Estimation Algorithm and Hardware Implementation for VVC

Shushi Chen;Leilei Huang;Zhao Zan;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2025 | Volume: 33, Issue: 2 | Journal Article |

Cited by: Papers (1)

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Versatile video coding (VVC) introduces multi-type tree (MTT) and larger coding tree unit (CTU) to improve compression efficiency compared to its predecessor High Efficiency Video Coding (HEVC). This leads to higher throughput for fractional motion estimation (FME) to meet the needs of real-time processing. In this context, this article proposes an interpolation-free algorithm based on an error su...Show More

An Interpolation-Free Fractional Motion Estimation Algorithm and Hardware Implementation for VVC

Shushi Chen;Leilei Huang;Zhao Zan;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2025 | Volume: 33, Issue: 2 | Journal Article |

Light-CIM: A Lightweight ADC/DAC-Fewer RRAM CIM DNN Accelerator With Fully Analog Tiles and Nonideality-Aware Algorithm for Consumer Electronics

Chenyang Zhao;Jinbei Fang;Jingwen Jiang;Xiaoyong Xue;Xiaoyang Zeng

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year: 2025 | Volume: 44, Issue: 2 | Journal Article |

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Neuromorphic computing has emerged as a revolutionary technology in consumer electronics, with computing-in-memory (CIM) attracting considerable attention for its potential to minimize data transfer. However, most CIM accelerators necessitate numerous digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) for mixed-signal data processing, resulting in substantial area and ener...Show More

Light-CIM: A Lightweight ADC/DAC-Fewer RRAM CIM DNN Accelerator With Fully Analog Tiles and Nonideality-Aware Algorithm for Consumer Electronics

Chenyang Zhao;Jinbei Fang;Jingwen Jiang;Xiaoyong Xue;Xiaoyang Zeng

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year: 2025 | Volume: 44, Issue: 2 | Journal Article |

Efficient and Robust Sparse Linear Discriminant Analysis for Data Classification

Jingjing Liu;Manlong Feng;Xianchao Xiu;Wanquan Liu;Xiaoyang Zeng

IEEE Transactions on Emerging Topics in Computational Intelligence

Year: 2025 | Volume: 9, Issue: 1 | Journal Article |

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Sparse linear discriminant analysis (LDA) is a popular machine learning method that improves the accuracy of data classification by introducing sparsity. However, its performance often degrades seriously when encountering noise. To address this issue, this paper proposes a new method called efficient and robust sparse linear discriminant analysis (ERSLDA). The core idea is to characterize the loca...Show More

Efficient and Robust Sparse Linear Discriminant Analysis for Data Classification

Jingjing Liu;Manlong Feng;Xianchao Xiu;Wanquan Liu;Xiaoyang Zeng

IEEE Transactions on Emerging Topics in Computational Intelligence

Year: 2025 | Volume: 9, Issue: 1 | Journal Article |

Conditional Cycle Termination RANSAC

Tong Jiang;Yujie Huang;Liyuan Peng;Mingyu Wang;Wenhong Li;Minge Jing;Xiaoyang Zeng

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

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In the field of computer vision, the acquired dataset usually contains a certain number of outliers and noise, which leads to errors in the estimated mathematical model. RANSAC estimates model parameters by randomly selecting a subset of the data, reducing the impact of these outliers and noise. However, for datasets with a high proportion of inliers, the traditional RANSAC has to perform a large ...Show More

Conditional Cycle Termination RANSAC

Tong Jiang;Yujie Huang;Liyuan Peng;Mingyu Wang;Wenhong Li;Minge Jing;Xiaoyang Zeng

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

S-SIFT: A Simple SIFT Algorithm with High Efficiency

Yixue Wang;Yujie Huang;Liyuan Peng;Mingyu Wang;Wenhong Li;Minge Jing;Xiaoyang Zeng

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

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Finding distinctions and connections between multiple visual targets through the detection of keypoints has become one of the research hot-spots in the field of computer vision. SIFT has received wide recognition and attention for its powerful performance in image match. However, the original SIFT has high complexity and time-consuming problems. In this paper, we propose Simple SIFT (S-SIFT), an i...Show More

S-SIFT: A Simple SIFT Algorithm with High Efficiency

Yixue Wang;Yujie Huang;Liyuan Peng;Mingyu Wang;Wenhong Li;Minge Jing;Xiaoyang Zeng

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering

Lizhou Wu;Haozhe Zhu;Jiapei Zheng;Mengjie Li;Yinuo Cheng;Qi Liu;Xiaoyang Zeng;Chixiao Chen

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2024 | Volume: 32, Issue: 12 | Journal Article |

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Neural radiance field (NeRF) has proved to be promising in augmented/virtual-reality applications. However, the deployment of NeRF on edge devices suffers from inadequate throughput due to redundant ray sampling and congested memory access. To address these challenges, this article proposes Hi-NeRF, a multirendering-core accelerator for efficient edge NeRF rendering. On the architecture level, a h...Show More

Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering

Lizhou Wu;Haozhe Zhu;Jiapei Zheng;Mengjie Li;Yinuo Cheng;Qi Liu;Xiaoyang Zeng;Chixiao Chen

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year: 2024 | Volume: 32, Issue: 12 | Journal Article |

Angular Parameter Estimation for Incoherently Distributed Sources With Single RF Chain

Ziyu Guo;Tao Yang;Peng Chen;Jun Han;Xiaoyang Zeng;Bo Hu

IEEE Transactions on Signal Processing

Year: 2024 | Volume: 72 | Journal Article |

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In this paper, we consider the problem of estimating the angular parameters, i.e., the nominal angle-of-arrivals (AoAs) and angular spreads, of incoherently distributed sources using the phased-array equipped with a single RF chain. We first derive the approximate Fourier series of the received power. The coefficients can be expressed in closed form with the angular parameters. In the case of sing...Show More

Angular Parameter Estimation for Incoherently Distributed Sources With Single RF Chain

Ziyu Guo;Tao Yang;Peng Chen;Jun Han;Xiaoyang Zeng;Bo Hu

IEEE Transactions on Signal Processing

Year: 2024 | Volume: 72 | Journal Article |

A 1024-Spin Scalable Ising Machine With Capacitive Coupling and Progressive Annealing Method for Combination Optimization Problems

Yixuan Liu;Zhongze Han;Qiqiao Wu;Honghu Yang;Yue Cao;Yongkang Han;Haijun Jiang;Xiaoyong Xue;Jianguo Yang;Xiaoyang Zeng

IEEE Transactions on Circuits and Systems II: Express Briefs

Year: 2024 | Volume: 71, Issue: 12 | Journal Article |

Cited by: Papers (1)

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A range of quantum-, optical- and CMOS-based approaches have been explored to solve Nondeterministic polynomial-time hard (NP-hard) combinatorial optimization problems (COPs), of which we consider ring oscillator (ROSC) coupled Ising machine to be highly prospective. This brief proposed a scalable ROSC-based Ising machine with capacity coupling and phase drift eliminator. The coupling module consi...Show More

A 1024-Spin Scalable Ising Machine With Capacitive Coupling and Progressive Annealing Method for Combination Optimization Problems

Yixuan Liu;Zhongze Han;Qiqiao Wu;Honghu Yang;Yue Cao;Yongkang Han;Haijun Jiang;Xiaoyong Xue;Jianguo Yang;Xiaoyang Zeng

IEEE Transactions on Circuits and Systems II: Express Briefs

Year: 2024 | Volume: 71, Issue: 12 | Journal Article |

A Lossless Compression Algorithm with Hardware Implementation for Dynamic Vision Sensor

Zewei Ding;Shangmei Wang;Yujie Cai;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

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Nowadays, with the increase resolution of Dynamic Vision Sensor (DVS), efficient compression algorithm for event stream is needed urgently. Conventional DVS system encodes event data in address event representation (AER) for output while ignores the data redundancy imposed by the correlation of events. To address this challenge, this paper first analyzes the spatiotemporal characteristics of event...Show More

A Lossless Compression Algorithm with Hardware Implementation for Dynamic Vision Sensor

Zewei Ding;Shangmei Wang;Yujie Cai;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

A 1024-Neuron 1M-Synapse Event-Driven SNN Accelerator for DVS Applications

Xi Cheng;Shu Cao;Shangmei Wang;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

Cited by: Papers (2)

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This paper proposed a hardware-algorithm co-design of an event-driven Spiking Neural Network (SNN) accelerator with structured sparsity for Dynamic Vision Sensors (DVS) applications. The accelerator can accommodate up to 1024 neurons and 1 million synapses for a feed-forward fully connected SNN implementation. Configurable structured sparsity is introduced by modular arithmetic both in the algorit...Show More

A 1024-Neuron 1M-Synapse Event-Driven SNN Accelerator for DVS Applications

Xi Cheng;Shu Cao;Shangmei Wang;Xiaoyang Zeng;Wenhong Li;Mingyu Wang

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

Privacy-preserving with Flexible Autoencoder for Video Coding for Machines

Aorui Gou;Heming Sun;Xiaoyang Zeng;Yibo Fan

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

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The dataset for Video Coding for Machines (VCM) contains sensitive information that requires privacy preservation to address vulnerabilities. Achieving a balance to protect this sensitive data while maintaining VCM performance is crucial. We introduce an autoencoder integrated with a deep learning network that utilizes the ResNet architecture. This design blurs private details while preserving the...Show More

Privacy-preserving with Flexible Autoencoder for Video Coding for Machines

Aorui Gou;Heming Sun;Xiaoyang Zeng;Yibo Fan

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2024 | Conference Paper |

A High Compression Efficiency Hardware Encoder for Intra and Inter Coding With 4K@30fps Throughput

Guohao Xu;Leilei Huang;Zhijian Hao;Wei Li;Shiyan Yi;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Circuits and Systems for Video Technology

Year: 2024 | Volume: 34, Issue: 11 | Journal Article |

Cited by: Papers (2)

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The promotion of the HEVC standard has significantly alleviated the burden of network transmission and video storage. However, its inherent complexity and data dependencies pose a significant challenge in achieving high compression efficiency hardware encoder. To tackle this challenge, we propose several hardware-oriented algorithms and achieve a hardware encoder supporting both intra and inter co...Show More

A High Compression Efficiency Hardware Encoder for Intra and Inter Coding With 4K@30fps Throughput

Guohao Xu;Leilei Huang;Zhijian Hao;Wei Li;Shiyan Yi;Xiaoyang Zeng;Yibo Fan

IEEE Transactions on Circuits and Systems for Video Technology

Year: 2024 | Volume: 34, Issue: 11 | Journal Article |

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