Development of the Readout Electronics for a MAPS-Based Beam Telescope

Along with the change of the Deutsches Elektronen-Synchrotron (DESY) II test beam facility operation mode, the existing beam telescope built with the Mimosa26 chips will be unable to meet the requirements of the much-increased beam particle rate. In this article, we present the readout electronics of a new beam telescope built with ALice PIxel Detector (ALPIDE) chips which are originally designed for the upgrade of A Large Ion Collider Experiment (ALICE). The gigabit Ethernet implemented in the high-speed transceiver of Kintex field programmable gate array (FPGA) enables individual data acquisition and control of each ALPIDE chip. The data from the multidetector plane are transmitted to the remote platform via an Ethernet switch. The global trigger is generated by an AIDA2020-trigger logic unit (TLU) by the coincidence of two pairs of plastic scintillators. The results of long-term beam tests show that the new beam telescope can achieve a lower fake hit rate and a trigger rate of 220 kHz, which increases beam utilization and reduces the difficulty of track reconstruction. The biased resolution of distribution using all six planes for tracking in a 6 GeV electron beam is measured to be about 5 $\mu \text{m}$ .