A Foreground Mismatch and Memory Harmonic Distortion Calibration Algorithm for TIADC

This paper proposes a foreground digital calibration algorithm that estimates and corrects the offset, gain, and time-skew mismatches for time-interleaved analog-to-digital converters (TIADCs) furthermore our algorithm is designed to correct for harmonic distortion introduced by the presence of a nonlinear front-end. We propose a novel simplified non-linear model in place of the more complex conventional Volterra series based structure. The mismatch estimation technique based on the Fast Fourier Transform (FFT) is proposed to estimate the various time-interleaving mismatches simultaneously. A Taylor-based technique is applied to compensate for these mismatches. We also consider the choice of an appropriate time reference for the time-skew correction algorithm by theoretical analysis. The nonlinear distortion correction technique is based on estimating and inverting an assumed $3^{\text {rd}}$ order nonlinearity with a fractional delay. To do this, we design a customized filter in an offline process. Our algorithms are designed to operate in any Nyquist zone. The proposed techniques are verified by a Xilinx Zynq UltraScale+ RFSoC ZCU111 evaluation kit containing a 12-bit, 4.096 GHz TI-ADC with 8 sub-ADCs operating in the $2^{\text {nd}}$ Nyquist zone. Accordingly, we observed an improvement in SFDR of 14 dB for mismatch calibration alone and up to another 12 dB with nonlinear correction enabled.