Performance Evaluation of Xilinx Zynq UltraScale+ RFSoC Device for Low Latency Applications

Recent years have seen a great surge of interest in design and development of wireless systems around disruptive technology of Xilinx Zynq Ultra Scale+ RFSoC (System on Chip) devices featuring higher throughputs, lower hardware latencies, and components count. In this paper, we have evaluated the performance of first generation of such devices from the view point of inherent loopback latencies using ZCU111 evaluation kit manufactured by Xilinx Inc. The on-chip radio frequency data converters (RFDC) have been operated at the sampling rate of 4GSPS. The observed latencies comprised of wider range and have found to be dependent upon several system parameters such as sampling rate, samples per clock cycle, clock frequency and decimation/interpolation factors for digital down converters (DDCs) and digital up converters (DUCs). Moreover, it has been observed that processing with real signals provide best and worst case latencies of 108nsec and 248nsec respectively while operated at a maximum clock of 500MHz. The similar best case values for complex (I/Q) signals have found to be 246ns at a clock of 250MHz. Worst case hardware latencies for both types of processing are 339ns approximately when operated at a minimum clock of 62.5MHz at RFDC rate of 4GSPS. These values are significantly lower as compared to the hardware latencies offered by other software defined radios (SDR) of analog devices such as AD9361. The results show that Xilinx Zynq UltraScale+ RFSoC devices are a breakthrough in wireless systems for meeting challenging requirements in time critical systems like defense, radars, 5G and LTE wireless communications, aerospace, and as testing instruments.