Design of Novel Hardware Architecture for Fully Homomorphic Encryption Algorithms in FPGA for Real-Time Data in Cloud Computing

In the cloud computing environment, the data is encrypted using a variety of cryptographic techniques before being sent to the cloud. But in this method, if someone wants to do some operation on the ciphertext, then the client needs to share the secret key to decrypt the ciphertext. So, there is a chance of data leakage. Now more research is being carried out on a fully homomorphic encryption scheme (FHE) to maintain the privacy and secrecy of user’s data in the cloud environment. Calculations can be performed on the ciphertext in this encryption technique without the need for decryption. The user will use a private key to decode the result into plain text format. But this method takes more time if it is implemented in software. So, it is not feasible to implement FHE on real-time data. To overcome these difficulties, we have developed a new hardware architecture for Brakerski, Vaikuntanathan (BV) fully homomorphic encryption scheme using Field Programmable Gate Array (FPGA). In this work, we have carried out an extensive simulation of the proposed design in MATLAB, and Python to validate the encryption and decryption algorithm. Further, we have simulated the design architecture of the BV scheme in the Questasim simulator and implemented it in an Intel FPGA using the Quartus tool. In this research work, we found that the proposed architecture takes 0.33 sec for key generation, 0.851 sec for encryption, and 72us for decryption when it is implemented using 32 butter-fly-based Number Theoretic Transfer (NTT) and consumes less FPGA hardware resources.