A 18.05 ppm/°C, $38.5\ \mu W$ Bandgap Reference Based on Weak Inversion Region Operation Design

This paper presents a low-power, low-noise, and high-performance bandgap reference with a high-order compensation technique by using MOSFETs operating in the sub-threshold region. This work offers a temperature coefficient of 18.05 ppm/°C and a PSRR of −52 dB while consuming
$35\ \mu\mathrm{A}$
current from an external power supply of 1.1 V. The BGR offers 1.26 nV/sqrt(Hz) of noise with an employed low pass filter at the output. The proposed bandgap reference is analyzed and implemented in the 40 nm CMOS SOI process, and the occupied die area is
$142\ \mu\mathrm{m}\times374\ \mu\mathrm{m}$
.