A Four-Phase Self-Timed Ring Based True Random Number Generator on FPGA

The random number generators (TRNGs) provide unpredictable data for various encryption operations such as information security. In this paper, a novel structure of TRNG is proposed based on the random jitter of a four-phase self-timed ring (FPSTR) as the entropy source on FPGA. The proposed TRNG is implemented on Xilinx KCU116 FPGAs with high throughput. Compared with existing designs, our proposal occupies 324 LUTs and 62 DFFs, and its throughput is up to 200 Mbps. The random bitstream generated by TRNG is statistically tested and passes the NIST SP800-22 and the NIST SP800-90B test.