A High Frequency MOS-Based Floating Charge-Controlled Memcapacitor Emulator

In this brief, a MOS-based memcapacitor emulator operating at
$1.2~MHz$
is proposed. The analytical model of the proposed emulator is verified numerically and experimentally. Numerical analysis of the proposed memcapacitor with respect to various parameters is performed using
$Cadence~Virtuoso$
with
$TSMC~180~nm$
PDKs followed by post-layout simulation, which also validates its correctness. Its area utilization and power consumption are
$2077.85~\mu m^{2}$
and
$2.726~mW$
, respectively. Its operating frequency is
$1.71\times $
higher than its nearest contemporary memcapacitor. Physical experiments are conducted utilizing
$CA3080$
to establish the correctness of the proposed emulator.