A Compact On-Chip Pad Structure With an Embedded Capacitor for Broadband Millimeter-Wave Bond-Wire Interconnection

This article presents a compact on-chip pad structure with an embedded capacitor for millimeter-wave bond-wire interconnection, which is realized by 65-nm complementary metal–oxide–semiconductor (CMOS) process and able to compensate the parasitic inductance introduced by bonding wires. The proposed pad structure implemented by metal stacking is equivalent to an on-chip series capacitor. Moreover, a deep N-well structure is loaded at the bottom of the pad to reduce the parasitic pad-to-ground capacitance. This pad structure has been applied to the chip-to-chip interconnection with a measured minimum insertion loss (IL) of 2.179 dB and a measured 3-dB bandwidth of 11.9 GHz from 35.6 to 47.5 GHz. In addition, it has been applied to the chip-to-printed circuit board (PCB) interconnect ion with a measured one-sided loss of 1.7475 dB and a measured 3-dB bandwidth of 12 GHz from 22.7 to 34.7 GHz. Both applications using bond-wire interconnections prove that the proposed pad structure can compensate bond-wire inductance and realize broadband low-loss impedance matching.