Transient current compensation for low-voltage high-current voltage regulator modules

The maximum current slew rate of the Pentium 4 microprocessor is 510A//spl mu/s and it will reach more than 1A/ns for future generations. However, the voltage regulator module (VRM) is always too slow (50A//spl mu/s) to react and results in output voltage spikes. The existence of large socket inductance between the motherboard and microprocessor package generates large voltage spikes under load-change transients due to its current response delay. A new active transient current compensation is presented to limit voltage spikes to within 1.5% variation in load-change transients when a microprocessor operates at 1V, 100A and 2A/ns of current slew rate with the package capacitance decreasing to less than one-half of the Pentium 4 level. Therefore, the total voltage variation is limited within 3%.