Operation and Performance of Timespot1: A High Time-Resolution 28 nm CMOS Pixel Read-Out ASIC

We present the characterization results of an ASIC, named Timespot1, designed in CMOS 28 nm technology, featuring a 32×32 pixel matrix with a pitch of 55 µm. The ASIC is conceived to be capable to read-out pixels with timing resolution in the range of 20 ps (3D-trench silicon sensors). Each pixel is endowed with a charge amplifier, a discriminator, and a Time-to-Digital Converter with time resolution around 30 ps and maximum read-out rates (per pixel) of 3 MHz. The timing performance are obtained keeping the power budget of per pixel lower than 40 µW per channel. The ASIC is under test in the laboratory in order to characterize its performance in terms of time resolution, power budget and sustainable rates. The ASIC will be hybridized on a matched 32×32 pixel sensor matrix and will be tested under laser beam and Minimum Ionizing Particles in the laboratory and at test beams. In this paper we present a description of the ASIC operation and the first results obtained from characterization tests concerning its performance in tracking measurements.