Hardware Co-Simulation of an Efficient Adaptive Filter based ECG Denoising System with Inbuilt Reference Generator

Ambulatory ECG monitoring is helpful for the early diagnosis of cardiac arrhythmia. However, the noise present in the ECG signal creates difficulties in ECG interpretation. Many artifact suppression methods are developed for the ambulatory ECG but are limited to software implementation due to high complexity. In this paper, a hybrid technique has been proposed with discrete wavelet transform (DWT) and an adaptive filter to denoise the ambulatory ECG signals. Further, the hardware architecture is designed using Xilinx System Generator and the hardware co-simulation is performed in a MATLAB-Simulink environment using the Virtex-7 FPGA. ECG signals from the MIT-BIH Arrhythmia database (mitdb) and Noise Stress Test Database (nstdb) are used for simulation and comparison. It shows that the proposed method gives on an average 18.17% more signal-to-noise ratio (SNR) improvement and 26.67% more mean square error (MSE) minimization compared to existing hybrid methods. The proposed hardware implementation shows 20.90% less hardware resources than the existing work. It occupies only 5.77% LUTs when implemented on the Virtex-7 FPGA.