A 4.4–75-TOPS/W 14-nm Programmable, Performance- and Precision-Tunable All-Digital Stochastic Computing Neural Network Inference Accelerator

We present the first programmable and precision-tunable stochastic computing (SC) neural network (NN) inference accelerator. The use of SC makes it possible to achieve multiply–accumulate (MAC) density of 38.4k MAC/mm
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, enabling a level of spatial data reuse unachievable to conventional, fixed-point architectures. This extensive reuse amortizes the cost of SC conversion and reduces the number of memory accesses, which can otherwise consume significant energy and latency. Our accelerator is a stand-alone architecture, with a custom instruction set architecture (ISA), and support for end-to-end model inference with convolutional and fully connected layers of variable input and filter sizes. Further, it demonstrates extensive accuracy–latency tradeoffs by varying the stream length. The 14-nm demonstration chip achieves 2.4-TOPS and 75-TOPS/W peak throughput and energy efficiency, outperforming comparable fixed-point accelerators.