Minimum Loss Operation of the Synchronous Buck Converter Using Si, SiC, and GaN Transistors

The transistors’ output capacitance is crucial to best exploit the synchronous buck or boost converter in high voltage and high frequency applications. This paper considers three device technologies and uses two simple analytical models to render the respective zero voltage switching transitions and to derive the optimum timing parameters. Their sensitivity to the reactive current is pronounced at the zero-voltage switching (ZVS) boundary. A scaling factor is therefore used to trade off accuracy demands and loss. The impact of the transistor type and operation on switching frequency and inverter loss is described in general terms. An experimental 1MHz, 500W, 400V buck converter employing 650V GaN HEMTs shows the modelled transients and an efficiency above 99%. The inductor uses an RM8 core with multiple air gaps to keep the proximity loss in the winding low.