GaN Reliability and Lifetime Projections

The rapid adoption of GaN devices in many diverse applications calls for continued accumulation of reliability statistics and research into the fundamental physics of failure in GaN devices. This paper presents the strategy used to measure and predict GaN device lifetime based upon tests that force devices to fail under a variety of conditions. This information can be used to create stronger and higher performance products for the industry. Standard qualification testing for semiconductors typically involves stressing devices at or near the limits specified in their datasheets for a prolonged period of time, or for a certain number of cycles. The goal of qualification testing is to have zero failures out of a relatively large group of parts tested. This type of testing is inadequate since it only reports parts that passed only a very specific test condition. By testing parts to the point of failure, an understanding of the amount of margin between the datasheet limits can be developed, and more importantly, an understanding of the intrinsic failure mechanisms can be found. By knowing the intrinsic failure mechanisms, the root cause of failure, and the behavior of the device over time, temperature, electrical or mechanical stress, the safe operating life of a product can be determined over a more general set of operating conditions. The key stress conditions encountered by GaN power devices and the intrinsic failure mechanisms for each stress condi-tion are discussed in detail in. This paper will focus on two failure mechanisms. The first of these mechanisms leads to the failure of the gate in a discrete GaN-on-Si transistor, and the second mechanism leads to the increase of device on-resistance.