Modeling and Analysis of a High Gain and Low Noise Figure 90 nm CMOS LNA Using Noise Cancellation Technique

This paper demonstrate the designing of inductorless low-noise amplifier (LNA) in 90nm CMOS (Complementary metal oxide semiconductor) technology. Two paths are introduced in this LNA, one is common source (CS) and the other is common gate (CG). Power gain is realized by CS path and input matching is achieved by CG path. The implementation of noise cancellation technique provides and enhancement in the Noise Figure (NF). Here S11 is negative for the entire band and S21 is positive for the entire band. S11 varies from −8 to −13.8dB and S21 varies from 4 to 10.5 dB in the frequency range of 0–2.5 GHz. At 2.5 GHz, the minimum NF value is 3 dB.