Extraction and Comparative Inspection of several parameters of 6T, 8T, 10T SRAM

For good memory design we need to explore the stability of the circuit in read and write modes and parallely keep track of better read and write delays . The main significance of this paper is to inspect several parameters like Read Delay(RD), Write Delay(WD), Average Power Consumption(APC) and all Static Noise Margins for read, write and hold modes(SNMR, SNMW, SNMH). We can change cell ratio and pull up ratio and do comparative analysis in two ways 1) varying CR, PR for 6T, 8T, 10T 2) By fixing CR, PR compare 6T, 8T, 10T comment on their performances. We can achieve better read delay and write delay as we increase the number of transistors, Variation in supply voltage and variation of CR and PR. The increase of these parameters and number of transistors cause an increase in power dissipation, so we have to draw lines based on power consumption and area occupied by our circuit.