Performance Comparison of Parity Preserving Flip-Flops Using Parity Preserving Gates by Quantum Cellular Automata and Verilog

The proposed research study has designed parity preserving FFs using parity preserving gates like FREDKIN gate (FRG) and FEYNMAN gate (FYG) using Quantum Cellular Automata (QCA). Incognitive property of reversible logic attracts most researchers where energy dissipation is a big concern. The complexity of parity reversible circuits is better than simple reversible circuits. The proposed models of the FF(FF) are way superior to the existing designs with regards to constant input, quantum cost, gate count, area, power dissipation, garbage output, and delay. The characteristics of the proposed FF are compared with the existing characteristics of the FF. It shows that the performance of QCA has increased by 24%, 28%, and 37.5% in terms of area and 55%, 62%, and 68% in terms of delay of our proposed D, T, and JK FFs respectively.