An Enhancement-Mode GaN p-FET With Improved Breakdown Voltage

In this letter, an enhancement-mode (E-mode) GaN p-channel field-effect transistors (p-FETs) with current density of −5.6 mA/mm and
${I} _{{\mathrm {ON}}}/{I} _{{\mathrm {OFF}}}$
ratio of 10
⁶
was demonstrated on a p-GaN/AlN/AlGaN/GaN heterostructure on Si substrate. A decent ohmic contact resistivity of
$9.25 \times 10^{-5} \Omega \cdot {\mathrm {cm}}^{2}$
is achieved by capping the heterostructure with a 10-nm heavily Mg-doped p
⁺⁺
-GaN epilayer. A two-step gate trench etching process, is implemented to overcome the decreased OFF-state blocking voltage associated with the surface p
⁺⁺
-GaN layer. The proposed structure is compelling for monolithic integration of GaN-based logic and power devices.