Fault Modeling and Testing of Spiking Neural Network Chips

Spiking neural network (SNN) is a very promising low-power neural network that can be implemented in asynchronous circuits. However, it is hard to test SNN chips since they are inherently probabilistic and fault tolerant. So far, there is no good fault model and test methodology suitable for SNN chips. In this paper, we propose seven behavior fault models for SNN based on the function of neurons and synapses. We also propose a test methodology, which considers the output response as a distribution rather than specific values. The experiment results on a MNIST dataset show that although SNN is fault tolerant, two fault models are still critical for SNN chips. Given the digit recognition application, the accuracy of chips that passed our test is 88.90%, which is indistinguishable from that of good chips, even in the effects of random seeds.