On-chip Power Combining with 3-Stage 75–110 GHz GaN MMIC Power Amplifiers

This paper presents reactive and balanced on-chip power combining of multi-stage power amplifiers (PAs) covering the entire 75–110 GHz band. Low device gain in W-band requires multiple stages, with a 3-stage reactively-combined PA achieving over 12 dB of simulated large signal gain from 75 to 110 GHz and 24 dBm of output power at 3 dB in compression at 110 GHz. Two HEMT devices sizes $4\times 25\ \mu\mathrm{m}$ and $4\times 37.5\ \mu \mathrm{m}$) in the HRL T3 40-nm GaN on 2-mil SiC process are used in the 3 stages. Broadband design techniques for reactive matching and power-combining enable coverage of the entire band, while maintaining in- and out-of-band stability. Two such 3-stage PAs are combined in a balanced architecture to achieve a 37.8% fractional bandwidth and a peak small-signal gain of 20 dB, with large-signal gain greater than 10 dB over the entire W-band. The peak power added efficiency (PAE) is around 14.8 %, and the peak power above 0.45W.