On the Compensation of Timing Mismatch in Two-Channel Time-Interleaved ADCs: Strategies and a Novel Parallel Compensation Structure

In this paper, two different timing-mismatch compensation strategies for two-channel time-interleaved analog-to-digital converters are comprehensively analyzed and compared. In the first strategy (SA), one channel serves as a reference channel, and the other channel is compensated to match the reference channel using the timing mismatch between the channels. In the second strategy (SB), both channels are compensated to match each other, using half the value of the channel mismatch with different signs. For SB, the paper introduces a novel compensation structure that utilizes parallel differentiator-multiplier (PDM) branches. Expressions for the spurious-free dynamic range (SFDR) after compensation are derived for both strategies. These expressions reveal that the novel PDM structure achieves a remarkably greater SFDR than the existing cascaded differentiator-multiplier (CDM) compensation structure which can be used for both SA and SB. This is because, after compensation, the remaining aliasing distortion in the proposed PDM structure is shown to be of higher approximation order (in terms of the mismatch value) and thus substantially smaller than in the CDM structure. Simulations included in the paper validate the theoretical results.