Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing

In this brief, we propose an efficient asynchronous parallel expected improvement matrix-based (EIM) constrained multi-objective optimization approach with mixed models for analog circuit sizing. In contrast to other asynchronous methods for single-objective optimization, our method aims to solve multi-objective problems with multiple constraints. The proposed new asynchronous strategy can parallelize not only circuit simulations but also the process of building models. We introduce an EIM criterion for objectives as the acquisition function and build radial basis function models for constraints. The proposed method is based on prescreening instead of internal optimization to further reduce the computational cost of models. Experimental results on two real-world circuits illustrate that when the batch size is 15, our proposed method provides with better trade-off information and reduces the total runtime of the optimization by up to 92X compared with NSGA-II. There is a speedup of up to 8X and 4X compared with the state-of-the-art synchronous approach and asynchronous approach in terms of the runtime.